<p>Philipp Hug has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28977">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">WIP: riscv: drop .data/.bss from bootblock<br><br>bootblock on RISC-V doesn't need a data and bss segment.<br>This makes it easier to execute the bootblock directly from boot media.<br><br>TODO: How can me make the linker complain if data segment is still present?<br><br>Change-Id: I61f9610ed11379e42b6696beffef6e4ca2e72dbd<br>Signed-off-by: Philipp Hug <philipp@hug.cx><br>---<br>M src/arch/riscv/include/arch/memlayout.h<br>M src/arch/riscv/misaligned.c<br>M src/soc/sifive/fu540/media.c<br>3 files changed, 12 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/28977/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/arch/riscv/include/arch/memlayout.h b/src/arch/riscv/include/arch/memlayout.h</span><br><span>index 7baab76..99e96e0 100644</span><br><span>--- a/src/arch/riscv/include/arch/memlayout.h</span><br><span>+++ b/src/arch/riscv/include/arch/memlayout.h</span><br><span>@@ -18,6 +18,14 @@</span><br><span> #ifndef __ARCH_MEMLAYOUT_H</span><br><span> #define __ARCH_MEMLAYOUT_H</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#if ENV_BOOTBLOCK</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * No .data or .bss sections in the bootblock</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+#define ARCH_STAGE_HAS_DATA_SECTION 0</span><br><span style="color: hsl(120, 100%, 40%);">+#define ARCH_STAGE_HAS_BSS_SECTION 0</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #define STACK(addr, size) REGION(stack, addr, size, 4096)</span><br><span> </span><br><span> #if defined(__PRE_RAM__)</span><br><span>diff --git a/src/arch/riscv/misaligned.c b/src/arch/riscv/misaligned.c</span><br><span>index ba96102..a91c4dd 100644</span><br><span>--- a/src/arch/riscv/misaligned.c</span><br><span>+++ b/src/arch/riscv/misaligned.c</span><br><span>@@ -57,7 +57,7 @@</span><br><span> unsigned int sign_extend : 1; /* mark need to be sign extended */</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static struct memory_instruction_info insn_info[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct memory_instruction_info insn_info[] = {</span><br><span> #if __riscv_xlen == 128</span><br><span> { 0x00002000, 0x0000e003, 2, 7, 8, 0, 1, 16, 1}, // C.LQ</span><br><span> #else</span><br><span>@@ -136,7 +136,7 @@</span><br><span> #endif // defined(__riscv_flen)</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static struct memory_instruction_info *match_instruction(uintptr_t insn)</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct memory_instruction_info *match_instruction(const uintptr_t insn)</span><br><span> {</span><br><span> int i;</span><br><span> for (i = 0; i < ARRAY_SIZE(insn_info); i++)</span><br><span>@@ -187,7 +187,7 @@</span><br><span> }</span><br><span> </span><br><span> /* matching instruction */</span><br><span style="color: hsl(0, 100%, 40%);">- struct memory_instruction_info *match = match_instruction(insn);</span><br><span style="color: hsl(120, 100%, 40%);">+ const struct memory_instruction_info *match = match_instruction(insn);</span><br><span> </span><br><span> if (!match) {</span><br><span> redirect_trap();</span><br><span>diff --git a/src/soc/sifive/fu540/media.c b/src/soc/sifive/fu540/media.c</span><br><span>index 7b9ccb0..754f956 100644</span><br><span>--- a/src/soc/sifive/fu540/media.c</span><br><span>+++ b/src/soc/sifive/fu540/media.c</span><br><span>@@ -16,7 +16,7 @@</span><br><span> #include <boot_device.h></span><br><span> </span><br><span> /* At 0x20000000: A 256MiB long memory-mapped view of the flash at QSPI0 */</span><br><span style="color: hsl(0, 100%, 40%);">-static struct mem_region_device mdev =</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct mem_region_device mdev =</span><br><span> MEM_REGION_DEV_RO_INIT((void *)0x20000000, CONFIG_ROM_SIZE);</span><br><span> </span><br><span> const struct region_device *boot_device_ro(void)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28977">change 28977</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I61f9610ed11379e42b6696beffef6e4ca2e72dbd </div>
<div style="display:none"> Gerrit-Change-Number: 28977 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Philipp Hug <philipp@hug.cx> </div>