[coreboot-gerrit] Change in coreboot[master]: src: Standardize PCI_DEV(0, 0x1f, 0) name

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/28956 )

Change subject: src: Standardize PCI_DEV(0, 0x1f, 0) name
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Patch Set 5: Code-Review-1

(1 comment)

https://review.coreboot.org/#/c/28956/5/src/southbridge/intel/bd82x6x/pch.h
File src/southbridge/intel/bd82x6x/pch.h:

https://review.coreboot.org/#/c/28956/5/src/southbridge/intel/bd82x6x/pch.h@133
PS5, Line 133: LPC_DEV		PCI_DEV(0, 0x1f, 0)
> But now this doesn't match all of the other #defines for the platform. […]
I agree....
we have many #defines for LPC :
we have PCH_LPC_DEV, LPC_DEV ... and even SOUTHBRIDGE is defined as LPC dev ...



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Gerrit-Project: coreboot
Gerrit-Branch: master
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Gerrit-Change-Id: I0be00e5e9c733bbeb863250bd51eea8d33f54300
Gerrit-Change-Number: 28956
Gerrit-PatchSet: 5
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-Reviewer: Elyes HAOUAS <ehaouas at noos.fr>
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Gerrit-Comment-Date: Mon, 08 Oct 2018 06:56:44 +0000
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