[coreboot-gerrit] Change in coreboot[master]: nb/intel/{gm45, i945, pineview}: Use macro instead of GGC address

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/28909


Change subject: nb/intel/{gm45,i945,pineview}: Use macro instead of GGC address
......................................................................

nb/intel/{gm45,i945,pineview}: Use macro instead of GGC address

Change-Id: I233e835180fd445961b6deb74ea7afc2821c236e
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/northbridge/intel/gm45/iommu.c
M src/northbridge/intel/i945/early_init.c
M src/northbridge/intel/pineview/gma.c
3 files changed, 3 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/28909/1

diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c
index 0108116..3a93dc5 100644
--- a/src/northbridge/intel/gm45/iommu.c
+++ b/src/northbridge/intel/gm45/iommu.c
@@ -46,7 +46,7 @@
 	MCHBAR32(0x20) = IOMMU_BASE4 | 1; /* all other DMA sources */
 
 	/* clear GTT */
-	u32 gtt = pci_read_config16(PCI_DEV(0, 0, 0), 0x52);
+	u32 gtt = pci_read_config16(PCI_DEV(0, 0, 0), D0F0_GGC);
 	if (gtt & 0x400) { /* VT mode */
 		pci_devfn_t igd = PCI_DEV(0, 2, 0);
 
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 7de2c73..a38874a 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -685,7 +685,7 @@
 	if (reg32 == 0x030000) {
 		printk(BIOS_DEBUG, "PCIe device is VGA. Disabling IGD.\n");
 		reg16 = (1 << 1);
-		pci_write_config16(PCI_DEV(0, 0x0, 0), 0x52, reg16);
+		pci_write_config16(PCI_DEV(0, 0x0, 0), GGC, reg16);
 
 		reg32 = pci_read_config32(PCI_DEV(0, 0x0, 0), DEVEN);
 		reg32 &= ~(DEVEN_D2F0 | DEVEN_D2F1);
diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c
index eb67c65..e075ac1 100644
--- a/src/northbridge/intel/pineview/gma.c
+++ b/src/northbridge/intel/pineview/gma.c
@@ -98,7 +98,7 @@
 
 	gtt_setup(mmio);
 
-	pci_write_config16(vga, 0x52, 0x130);
+	pci_write_config16(vga, GGC, 0x130);
 
 	/* Disable VGA.  */
 	write32(mmio + VGACNTRL, VGA_DISP_DISABLE);

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I233e835180fd445961b6deb74ea7afc2821c236e
Gerrit-Change-Number: 28909
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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