[coreboot-gerrit] Change in coreboot[master]: soc/nvidia/tegra124: Increase bootblock size

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/28875


Change subject: soc/nvidia/tegra124: Increase bootblock size
......................................................................

soc/nvidia/tegra124: Increase bootblock size

Increase bootblock size by 4KiB and reduce romstage by 4 KiB.

Change-Id: I604fd9c63a4cf6fb7b18249a6d73cd637e184a71
Signed-off-by: Patrick Rudolph <patrick.rudolph at 9elements.com>
---
M src/soc/nvidia/tegra124/include/soc/memlayout.ld
1 file changed, 3 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/28875/1

diff --git a/src/soc/nvidia/tegra124/include/soc/memlayout.ld b/src/soc/nvidia/tegra124/include/soc/memlayout.ld
index 6e596f3..615f0563 100644
--- a/src/soc/nvidia/tegra124/include/soc/memlayout.ld
+++ b/src/soc/nvidia/tegra124/include/soc/memlayout.ld
@@ -31,9 +31,9 @@
 	PRERAM_CBFS_CACHE(0x40006000, 16K)
 	VBOOT2_WORK(0x4000A000, 16K)
 	STACK(0x4000E000, 8K)
-	BOOTBLOCK(0x40010000, 26K)
-	VERSTAGE(0x40016800, 72K)
-	ROMSTAGE(0x40028800, 93K)
+	BOOTBLOCK(0x40010000, 30K)
+	VERSTAGE(0x40017800, 72K)
+	ROMSTAGE(0x40029800, 89K)
 	TIMESTAMP(0x4003FC00, 1K)
 	SRAM_END(0x40040000)
 

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I604fd9c63a4cf6fb7b18249a6d73cd637e184a71
Gerrit-Change-Number: 28875
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph at 9elements.com>
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