[coreboot-gerrit] Change in ...coreboot[master]: qcs405: Add Timer support

Name of user not set (Code Review) gerrit at coreboot.org
Fri Nov 30 11:14:00 CET 2018


nsekar at codeaurora.org has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29952


Change subject: qcs405: Add Timer support
......................................................................

qcs405: Add Timer support

Init frequency to 19.2 MHz

TEST=build

Change-Id: I566c7ff2b7085c9dd89ea74a08f3ba862feab2ab
Signed-off-by: Sricharan R <sricharan at codeaurora.org>
Signed-off-by: Nitheesh Sekar <nsekar at codeaurora.org>
---
M src/soc/qualcomm/qcs405/Kconfig
M src/soc/qualcomm/qcs405/Makefile.inc
M src/soc/qualcomm/qcs405/timer.c
3 files changed, 8 insertions(+), 11 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/29952/1

diff --git a/src/soc/qualcomm/qcs405/Kconfig b/src/soc/qualcomm/qcs405/Kconfig
index 560d988..83c3996 100644
--- a/src/soc/qualcomm/qcs405/Kconfig
+++ b/src/soc/qualcomm/qcs405/Kconfig
@@ -10,6 +10,7 @@
 	select GENERIC_GPIO_LIB
 	select GENERIC_UDELAY
 	select HAVE_MONOTONIC_TIMER
+	select ARM64_USE_ARCH_TIMER
 
 if SOC_QUALCOMM_QCS405
 
diff --git a/src/soc/qualcomm/qcs405/Makefile.inc b/src/soc/qualcomm/qcs405/Makefile.inc
index 2d1f842..b47a61e 100644
--- a/src/soc/qualcomm/qcs405/Makefile.inc
+++ b/src/soc/qualcomm/qcs405/Makefile.inc
@@ -3,24 +3,24 @@
 
 ################################################################################
 bootblock-y += bootblock.c
-bootblock-y += timer.c
 bootblock-y += spi.c
 bootblock-y += mmu.c
+bootblock-y += timer.c
 
 ################################################################################
-verstage-y += timer.c
 verstage-y += spi.c
+verstage-y += timer.c
 
 ################################################################################
-romstage-y += timer.c
 romstage-y += spi.c
 romstage-y += cbmem.c
+romstage-y += timer.c
 
 ################################################################################
 ramstage-y += soc.c
-ramstage-y += timer.c
 ramstage-y += spi.c
 ramstage-y += cbmem.c
+ramstage-y += timer.c
 
 ################################################################################
 
diff --git a/src/soc/qualcomm/qcs405/timer.c b/src/soc/qualcomm/qcs405/timer.c
index 8fb84c8..5df2430 100644
--- a/src/soc/qualcomm/qcs405/timer.c
+++ b/src/soc/qualcomm/qcs405/timer.c
@@ -13,15 +13,11 @@
  * GNU General Public License for more details.
  */
 
-#include <timer.h>
 #include <delay.h>
-
-void timer_monotonic_get(struct mono_time *mt)
-{
-
-}
+#include <arch/lib_helpers.h>
+#include <commonlib/helpers.h>
 
 void init_timer(void)
 {
-
+	raw_write_cntfrq_el0(19200*KHz);
 }

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I566c7ff2b7085c9dd89ea74a08f3ba862feab2ab
Gerrit-Change-Number: 29952
Gerrit-PatchSet: 1
Gerrit-Owner: nsekar at codeaurora.org
Gerrit-MessageType: newchange
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