[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/braswell: Add C_ENVIRONMENT_BOOTBLOCK support

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 )

Change subject: soc/intel/braswell: Add C_ENVIRONMENT_BOOTBLOCK support
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Patch Set 5:

(1 comment)

https://review.coreboot.org/#/c/29662/5/src/soc/intel/braswell/bootblock/cache_as_ram_cbootblock.S 
File src/soc/intel/braswell/bootblock/cache_as_ram_cbootblock.S:

https://review.coreboot.org/#/c/29662/5/src/soc/intel/braswell/bootblock/cache_as_ram_cbootblock.S@21 
PS5, Line 21: #include <device/pci_def.h>
> Specific support (provide timestamp, bootblock_pre_c_entry label) for C bootblock is required.
I don't see why it's specific to braswell.
Can you place it in drivers/intel/fsp1_1 ?
That way all FSP1.1 can share the same code and be migrated to c bootblock.



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c
Gerrit-Change-Number: 29662
Gerrit-PatchSet: 5
Gerrit-Owner: Frans Hendriks <fhendriks at eltan.com>
Gerrit-Reviewer: Frans Hendriks <fhendriks at eltan.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-CC: Patrick Rudolph <siro at das-labor.org>
Gerrit-Comment-Date: Wed, 28 Nov 2018 09:12:42 +0000
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Comment-In-Reply-To: Patrick Rudolph <siro at das-labor.org>
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