[coreboot-gerrit] Change in ...coreboot[master]: src/mb/pcengines/apu2/mainboard.c: Fix retrieving serial number
Michał Żygowski (Code Review)
gerrit at coreboot.org
Mon Nov 26 19:56:57 CET 2018
Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29842
Change subject: src/mb/pcengines/apu2/mainboard.c: Fix retrieving serial number
......................................................................
src/mb/pcengines/apu2/mainboard.c: Fix retrieving serial number
Handle situation when first NIC is not BDF 1:0.0. The PCI enumeration
is different when a external PCIe device is connected to mPCIe2 slot
which is routed to first PCIe bridge. The first NIC is then assigned
BDF 2:0.0, because it is connected to the second PCIe bridge.
Add a check for vendor ID and device ID of the NIC, before reading
MAC address and calculating serial number.
Signed-off-by: Michał Żygowski <michal.zygowski at 3mdeb.com>
Change-Id: I9f89a6f3cd0c23a2d2924e587338f69c260b12f8
---
M src/mainboard/pcengines/apu2/mainboard.c
1 file changed, 30 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/29842/1
diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c
index 35385c2..f54c4a0 100644
--- a/src/mainboard/pcengines/apu2/mainboard.c
+++ b/src/mainboard/pcengines/apu2/mainboard.c
@@ -19,6 +19,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
+#
#include <southbridge/amd/pi/hudson/hudson.h>
#include <southbridge/amd/pi/hudson/pci_devs.h>
#include <southbridge/amd/pi/hudson/amd_pci_int_defs.h>
@@ -197,11 +198,38 @@
struct device *nic_dev;
uintptr_t bar10;
u32 mac_addr = 0;
+ u16 vendor_id, device_id;
int i;
nic_dev = dev_find_slot(1, PCI_DEVFN(0, 0));
- if ((serial[0] != 0) || !nic_dev)
- return serial;
+ /*
+ * Check if we really have found first NIC. In case we have PCIe module
+ * connected to mPCIe2 slot, BDF 1:0.0 may not be a NIC, because mPCIe2
+ * slot is routed to the very first PCIe bridge and the first NIC is
+ * connected to the second PCIe bridge.
+ */
+ if (!serial || !nic_dev)
+ return -1;
+ vendor_id = pci_read_config16(nic_dev, 0x0);
+ device_id = pci_read_config16(nic_dev, 0x2);
+
+ /*
+ * apu boards have Intel NICs. If vendor ID does not match, it means
+ * that something is connected to mPCIe2 slot. Look on BDF 2:0.0.
+ */
+ if (vendor_id != PCI_VENDOR_ID_INTEL) {
+ nic_dev = dev_find_slot(2, PCI_DEVFN(0, 0));
+ if (!nic_dev)
+ return -1;
+ vendor_id = pci_read_config16(nic_dev, 0x0);
+ device_id = pci_read_config16(nic_dev, 0x2);
+ if (vendor_id != PCI_VENDOR_ID_INTEL)
+ return -1;
+ }
+
+ /* Handle both hardware options: i210 and i211 NICs */
+ if ((device_id != 0x1537) && (device_id != 0x157b))
+ return -1;
/* Read in the last 3 bytes of NIC's MAC address. */
bar10 = pci_read_config32(nic_dev, 0x10);
--
To view, visit https://review.coreboot.org/c/coreboot/+/29842
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9f89a6f3cd0c23a2d2924e587338f69c260b12f8
Gerrit-Change-Number: 29842
Gerrit-PatchSet: 1
Gerrit-Owner: Michał Żygowski <michal.zygowski at 3mdeb.com>
Gerrit-MessageType: newchange
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