[coreboot-gerrit] Change in ...coreboot[master]: mediatek: Share GPIO external interrupts (EINT) code among similar SoCs
Tristan Hsieh (Code Review)
gerrit at coreboot.org
Mon Nov 26 12:44:00 CET 2018
Tristan Hsieh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29837
Change subject: mediatek: Share GPIO external interrupts (EINT) code among similar SoCs
......................................................................
mediatek: Share GPIO external interrupts (EINT) code among similar SoCs
Refactor GPIO EINT code which can be reused among similar SoCs.
BUG=b:80501386
BRANCH=none
TEST=emerge-elm coreboot; emerge-kukui coreboot
Change-Id: Ib01b43cf1aa4082d7d968fe1ef82f75e8cf05b8b
Signed-off-by: Chuanjia Liu <Chuanjia.Liu at mediatek.com>
---
M src/soc/mediatek/common/gpio.c
M src/soc/mediatek/common/include/soc/gpio_common.h
M src/soc/mediatek/mt8173/gpio.c
M src/soc/mediatek/mt8173/include/soc/gpio.h
M src/soc/mediatek/mt8183/include/soc/addressmap.h
M src/soc/mediatek/mt8183/include/soc/gpio.h
6 files changed, 116 insertions(+), 96 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/29837/1
diff --git a/src/soc/mediatek/common/gpio.c b/src/soc/mediatek/common/gpio.c
index 590f8ea..371ff26 100644
--- a/src/soc/mediatek/common/gpio.c
+++ b/src/soc/mediatek/common/gpio.c
@@ -126,3 +126,64 @@
gpio_set_dir(gpio, GPIO_DIRECTION_OUT);
gpio_set_mode(gpio, GPIO_MODE);
}
+
+enum {
+ MAX_EINT_REG_BITS = 32,
+};
+
+static void pos_bit_calc_for_eint(gpio_t gpio, u32 *pos, u32 *bit)
+{
+ *pos = gpio.id / MAX_EINT_REG_BITS;
+ *bit = gpio.id % MAX_EINT_REG_BITS;
+}
+
+int gpio_eint_poll(gpio_t gpio)
+{
+ u32 pos;
+ u32 bit;
+ u32 status;
+
+ pos_bit_calc_for_eint(gpio, &pos, &bit);
+
+ status = (read32(&mtk_eint->sta.regs[pos]) >> bit) & 0x1;
+
+ if (status)
+ write32(&mtk_eint->ack.regs[pos], 1 << bit);
+
+ return status;
+}
+
+void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type)
+{
+ u32 pos;
+ u32 bit, mask;
+
+ pos_bit_calc_for_eint(gpio, &pos, &bit);
+ mask = 1 << bit;
+
+ /* Make it an input first. */
+ gpio_input_pullup(gpio);
+
+ write32(&mtk_eint->d0en[pos], mask);
+
+ switch (type) {
+ case IRQ_TYPE_EDGE_FALLING:
+ write32(&mtk_eint->sens_clr.regs[pos], mask);
+ write32(&mtk_eint->pol_clr.regs[pos], mask);
+ break;
+ case IRQ_TYPE_EDGE_RISING:
+ write32(&mtk_eint->sens_clr.regs[pos], mask);
+ write32(&mtk_eint->pol_set.regs[pos], mask);
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ write32(&mtk_eint->sens_set.regs[pos], mask);
+ write32(&mtk_eint->pol_clr.regs[pos], mask);
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+ write32(&mtk_eint->sens_set.regs[pos], mask);
+ write32(&mtk_eint->pol_set.regs[pos], mask);
+ break;
+ }
+
+ write32(&mtk_eint->mask_clr.regs[pos], mask);
+}
diff --git a/src/soc/mediatek/common/include/soc/gpio_common.h b/src/soc/mediatek/common/include/soc/gpio_common.h
index 22acd92..b9b9714 100644
--- a/src/soc/mediatek/common/include/soc/gpio_common.h
+++ b/src/soc/mediatek/common/include/soc/gpio_common.h
@@ -16,6 +16,9 @@
#ifndef SOC_MEDIATEK_COMMON_GPIO_H
#define SOC_MEDIATEK_COMMON_GPIO_H
+#include <stddef.h>
+#include <stdint.h>
+
enum pull_enable {
GPIO_PULL_DISABLE = 0,
GPIO_PULL_ENABLE = 1,
@@ -26,4 +29,42 @@
GPIO_PULL_UP = 1,
};
+enum gpio_irq_type {
+ IRQ_TYPE_EDGE_RISING,
+ IRQ_TYPE_EDGE_FALLING,
+ IRQ_TYPE_LEVEL_HIGH,
+ IRQ_TYPE_LEVEL_LOW,
+};
+
+struct eint_section {
+ uint32_t regs[7];
+ uint32_t align1[9];
+};
+
+struct eint_regs {
+ struct eint_section sta;
+ struct eint_section ack;
+ struct eint_section mask;
+ struct eint_section mask_set;
+ struct eint_section mask_clr;
+ struct eint_section sens;
+ struct eint_section sens_set;
+ struct eint_section sens_clr;
+ struct eint_section soft;
+ struct eint_section soft_set;
+ struct eint_section soft_clr;
+ struct eint_section rsv00;
+ struct eint_section pol;
+ struct eint_section pol_set;
+ struct eint_section pol_clr;
+ struct eint_section rsv01;
+ uint32_t d0en[7];
+ uint32_t rsv02;
+ uint32_t d1en[7];
+};
+
+check_member(eint_regs, d1en, 0x420);
+
+static struct eint_regs *const mtk_eint = (void *)(EINT_BASE);
+
#endif
diff --git a/src/soc/mediatek/mt8173/gpio.c b/src/soc/mediatek/mt8173/gpio.c
index 518df85..259ac53 100644
--- a/src/soc/mediatek/mt8173/gpio.c
+++ b/src/soc/mediatek/mt8173/gpio.c
@@ -19,7 +19,6 @@
enum {
MAX_GPIO_NUMBER = 134,
- MAX_EINT_REG_BITS = 32,
};
static void pos_bit_calc(gpio_t gpio, u32 *pos, u32 *bit)
@@ -28,12 +27,6 @@
*bit = gpio.id % MAX_GPIO_REG_BITS;
}
-static void pos_bit_calc_for_eint(gpio_t gpio, u32 *pos, u32 *bit)
-{
- *pos = gpio.id / MAX_EINT_REG_BITS;
- *bit = gpio.id % MAX_EINT_REG_BITS;
-}
-
void gpio_set_pull(gpio_t gpio, enum pull_enable enable,
enum pull_select select)
{
@@ -63,54 +56,3 @@
}
write16(en_reg, 1L << bit);
}
-
-int gpio_eint_poll(gpio_t gpio)
-{
- u32 pos;
- u32 bit;
- u32 status;
-
- pos_bit_calc_for_eint(gpio, &pos, &bit);
-
- status = (read32(&mt8173_eint->sta.regs[pos]) >> bit) & 0x1;
-
- if (status)
- write32(&mt8173_eint->ack.regs[pos], 1 << bit);
-
- return status;
-}
-
-void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type)
-{
- u32 pos;
- u32 bit, mask;
-
- pos_bit_calc_for_eint(gpio, &pos, &bit);
- mask = 1 << bit;
-
- /* Make it an input first. */
- gpio_input_pullup(gpio);
-
- write32(&mt8173_eint->d0en[pos], mask);
-
- switch (type) {
- case IRQ_TYPE_EDGE_FALLING:
- write32(&mt8173_eint->sens_clr.regs[pos], mask);
- write32(&mt8173_eint->pol_clr.regs[pos], mask);
- break;
- case IRQ_TYPE_EDGE_RISING:
- write32(&mt8173_eint->sens_clr.regs[pos], mask);
- write32(&mt8173_eint->pol_set.regs[pos], mask);
- break;
- case IRQ_TYPE_LEVEL_LOW:
- write32(&mt8173_eint->sens_set.regs[pos], mask);
- write32(&mt8173_eint->pol_clr.regs[pos], mask);
- break;
- case IRQ_TYPE_LEVEL_HIGH:
- write32(&mt8173_eint->sens_set.regs[pos], mask);
- write32(&mt8173_eint->pol_set.regs[pos], mask);
- break;
- }
-
- write32(&mt8173_eint->mask_clr.regs[pos], mask);
-}
diff --git a/src/soc/mediatek/mt8173/include/soc/gpio.h b/src/soc/mediatek/mt8173/include/soc/gpio.h
index a78c8b4..e2bd12f 100644
--- a/src/soc/mediatek/mt8173/include/soc/gpio.h
+++ b/src/soc/mediatek/mt8173/include/soc/gpio.h
@@ -369,44 +369,6 @@
void gpio_set_mode(gpio_t gpio, int mode);
void gpio_init(enum external_power);
-enum gpio_irq_type {
- IRQ_TYPE_EDGE_RISING,
- IRQ_TYPE_EDGE_FALLING,
- IRQ_TYPE_LEVEL_HIGH,
- IRQ_TYPE_LEVEL_LOW,
-};
-
-struct eint_section {
- uint32_t regs[7];
- uint32_t align1[9];
-};
-
-struct eint_regs {
- struct eint_section sta;
- struct eint_section ack;
- struct eint_section mask;
- struct eint_section mask_set;
- struct eint_section mask_clr;
- struct eint_section sens;
- struct eint_section sens_set;
- struct eint_section sens_clr;
- struct eint_section soft;
- struct eint_section soft_set;
- struct eint_section soft_clr;
- struct eint_section rsv00;
- struct eint_section pol;
- struct eint_section pol_set;
- struct eint_section pol_clr;
- struct eint_section rsv01;
- uint32_t d0en[7];
- uint32_t rsv02;
- uint32_t d1en[7];
-};
-
-check_member(eint_regs, d1en, 0x420);
-
-static struct eint_regs *const mt8173_eint = (void *)(EINT_BASE);
-
/*
* Firmware never enables interrupts on this platform. This function
* reads current EINT status and clears the pending interrupt.
diff --git a/src/soc/mediatek/mt8183/include/soc/addressmap.h b/src/soc/mediatek/mt8183/include/soc/addressmap.h
index cee9bd8..23a6804 100644
--- a/src/soc/mediatek/mt8183/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8183/include/soc/addressmap.h
@@ -28,6 +28,7 @@
SPM_BASE = IO_PHYS + 0x00006000,
RGU_BASE = IO_PHYS + 0x00007000,
GPT_BASE = IO_PHYS + 0x00008000,
+ EINT_BASE = IO_PHYS + 0x0000B000,
APMIXED_BASE = IO_PHYS + 0x0000C000,
EMI_BASE = IO_PHYS + 0x00219000,
EMI_MPU_BASE = IO_PHYS + 0x00226000,
diff --git a/src/soc/mediatek/mt8183/include/soc/gpio.h b/src/soc/mediatek/mt8183/include/soc/gpio.h
index 1faab44..12a8c10 100644
--- a/src/soc/mediatek/mt8183/include/soc/gpio.h
+++ b/src/soc/mediatek/mt8183/include/soc/gpio.h
@@ -632,4 +632,17 @@
enum pull_select select);
void gpio_set_mode(gpio_t gpio, int mode);
+/*
+ * Firmware never enables interrupts on this platform. This function
+ * reads current EINT status and clears the pending interrupt.
+ *
+ * Returns 1 if the interrupt was pending, else 0.
+ */
+int gpio_eint_poll(gpio_t gpio);
+
+/*
+ * Configure a GPIO to handle external interrupts (EINT) of given irq type.
+ */
+void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type);
+
#endif
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ib01b43cf1aa4082d7d968fe1ef82f75e8cf05b8b
Gerrit-Change-Number: 29837
Gerrit-PatchSet: 1
Gerrit-Owner: Tristan Hsieh <tristan.shieh at mediatek.com>
Gerrit-Reviewer: Julius Werner <jwerner at chromium.org>
Gerrit-Reviewer: Tristan Hsieh <tristan.shieh at mediatek.com>
Gerrit-MessageType: newchange
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