<p>Tristan Hsieh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/c/coreboot/+/29837">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mediatek: Share GPIO external interrupts (EINT) code among similar SoCs<br><br>Refactor GPIO EINT code which can be reused among similar SoCs.<br><br>BUG=b:80501386<br>BRANCH=none<br>TEST=emerge-elm coreboot; emerge-kukui coreboot<br><br>Change-Id: Ib01b43cf1aa4082d7d968fe1ef82f75e8cf05b8b<br>Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com><br>---<br>M src/soc/mediatek/common/gpio.c<br>M src/soc/mediatek/common/include/soc/gpio_common.h<br>M src/soc/mediatek/mt8173/gpio.c<br>M src/soc/mediatek/mt8173/include/soc/gpio.h<br>M src/soc/mediatek/mt8183/include/soc/addressmap.h<br>M src/soc/mediatek/mt8183/include/soc/gpio.h<br>6 files changed, 116 insertions(+), 96 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/29837/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/mediatek/common/gpio.c b/src/soc/mediatek/common/gpio.c</span><br><span>index 590f8ea..371ff26 100644</span><br><span>--- a/src/soc/mediatek/common/gpio.c</span><br><span>+++ b/src/soc/mediatek/common/gpio.c</span><br><span>@@ -126,3 +126,64 @@</span><br><span> gpio_set_dir(gpio, GPIO_DIRECTION_OUT);</span><br><span> gpio_set_mode(gpio, GPIO_MODE);</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+enum {</span><br><span style="color: hsl(120, 100%, 40%);">+ MAX_EINT_REG_BITS = 32,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void pos_bit_calc_for_eint(gpio_t gpio, u32 *pos, u32 *bit)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ *pos = gpio.id / MAX_EINT_REG_BITS;</span><br><span style="color: hsl(120, 100%, 40%);">+ *bit = gpio.id % MAX_EINT_REG_BITS;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int gpio_eint_poll(gpio_t gpio)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 pos;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 bit;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 status;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ pos_bit_calc_for_eint(gpio, &pos, &bit);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ status = (read32(&mtk_eint->sta.regs[pos]) >> bit) & 0x1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (status)</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->ack.regs[pos], 1 << bit);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return status;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 pos;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 bit, mask;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ pos_bit_calc_for_eint(gpio, &pos, &bit);</span><br><span style="color: hsl(120, 100%, 40%);">+ mask = 1 << bit;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Make it an input first. */</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_input_pullup(gpio);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->d0en[pos], mask);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (type) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case IRQ_TYPE_EDGE_FALLING:</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->sens_clr.regs[pos], mask);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->pol_clr.regs[pos], mask);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case IRQ_TYPE_EDGE_RISING:</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->sens_clr.regs[pos], mask);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->pol_set.regs[pos], mask);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case IRQ_TYPE_LEVEL_LOW:</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->sens_set.regs[pos], mask);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->pol_clr.regs[pos], mask);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case IRQ_TYPE_LEVEL_HIGH:</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->sens_set.regs[pos], mask);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->pol_set.regs[pos], mask);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(&mtk_eint->mask_clr.regs[pos], mask);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/soc/mediatek/common/include/soc/gpio_common.h b/src/soc/mediatek/common/include/soc/gpio_common.h</span><br><span>index 22acd92..b9b9714 100644</span><br><span>--- a/src/soc/mediatek/common/include/soc/gpio_common.h</span><br><span>+++ b/src/soc/mediatek/common/include/soc/gpio_common.h</span><br><span>@@ -16,6 +16,9 @@</span><br><span> #ifndef SOC_MEDIATEK_COMMON_GPIO_H</span><br><span> #define SOC_MEDIATEK_COMMON_GPIO_H</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#include <stddef.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <stdint.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> enum pull_enable {</span><br><span> GPIO_PULL_DISABLE = 0,</span><br><span> GPIO_PULL_ENABLE = 1,</span><br><span>@@ -26,4 +29,42 @@</span><br><span> GPIO_PULL_UP = 1,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+enum gpio_irq_type {</span><br><span style="color: hsl(120, 100%, 40%);">+ IRQ_TYPE_EDGE_RISING,</span><br><span style="color: hsl(120, 100%, 40%);">+ IRQ_TYPE_EDGE_FALLING,</span><br><span style="color: hsl(120, 100%, 40%);">+ IRQ_TYPE_LEVEL_HIGH,</span><br><span style="color: hsl(120, 100%, 40%);">+ IRQ_TYPE_LEVEL_LOW,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+struct eint_section {</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t regs[7];</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t align1[9];</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+struct eint_regs {</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section sta;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section ack;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section mask;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section mask_set;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section mask_clr;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section sens;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section sens_set;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section sens_clr;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section soft;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section soft_set;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section soft_clr;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section rsv00;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section pol;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section pol_set;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section pol_clr;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct eint_section rsv01;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t d0en[7];</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t rsv02;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t d1en[7];</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+check_member(eint_regs, d1en, 0x420);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static struct eint_regs *const mtk_eint = (void *)(EINT_BASE);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif</span><br><span>diff --git a/src/soc/mediatek/mt8173/gpio.c b/src/soc/mediatek/mt8173/gpio.c</span><br><span>index 518df85..259ac53 100644</span><br><span>--- a/src/soc/mediatek/mt8173/gpio.c</span><br><span>+++ b/src/soc/mediatek/mt8173/gpio.c</span><br><span>@@ -19,7 +19,6 @@</span><br><span> </span><br><span> enum {</span><br><span> MAX_GPIO_NUMBER = 134,</span><br><span style="color: hsl(0, 100%, 40%);">- MAX_EINT_REG_BITS = 32,</span><br><span> };</span><br><span> </span><br><span> static void pos_bit_calc(gpio_t gpio, u32 *pos, u32 *bit)</span><br><span>@@ -28,12 +27,6 @@</span><br><span> *bit = gpio.id % MAX_GPIO_REG_BITS;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pos_bit_calc_for_eint(gpio_t gpio, u32 *pos, u32 *bit)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- *pos = gpio.id / MAX_EINT_REG_BITS;</span><br><span style="color: hsl(0, 100%, 40%);">- *bit = gpio.id % MAX_EINT_REG_BITS;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> void gpio_set_pull(gpio_t gpio, enum pull_enable enable,</span><br><span> enum pull_select select)</span><br><span> {</span><br><span>@@ -63,54 +56,3 @@</span><br><span> }</span><br><span> write16(en_reg, 1L << bit);</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-int gpio_eint_poll(gpio_t gpio)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- u32 pos;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 bit;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 status;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- pos_bit_calc_for_eint(gpio, &pos, &bit);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- status = (read32(&mt8173_eint->sta.regs[pos]) >> bit) & 0x1;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (status)</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->ack.regs[pos], 1 << bit);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return status;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- u32 pos;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 bit, mask;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- pos_bit_calc_for_eint(gpio, &pos, &bit);</span><br><span style="color: hsl(0, 100%, 40%);">- mask = 1 << bit;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Make it an input first. */</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_input_pullup(gpio);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->d0en[pos], mask);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- switch (type) {</span><br><span style="color: hsl(0, 100%, 40%);">- case IRQ_TYPE_EDGE_FALLING:</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->sens_clr.regs[pos], mask);</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->pol_clr.regs[pos], mask);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case IRQ_TYPE_EDGE_RISING:</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->sens_clr.regs[pos], mask);</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->pol_set.regs[pos], mask);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case IRQ_TYPE_LEVEL_LOW:</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->sens_set.regs[pos], mask);</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->pol_clr.regs[pos], mask);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case IRQ_TYPE_LEVEL_HIGH:</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->sens_set.regs[pos], mask);</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->pol_set.regs[pos], mask);</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- write32(&mt8173_eint->mask_clr.regs[pos], mask);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/soc/mediatek/mt8173/include/soc/gpio.h b/src/soc/mediatek/mt8173/include/soc/gpio.h</span><br><span>index a78c8b4..e2bd12f 100644</span><br><span>--- a/src/soc/mediatek/mt8173/include/soc/gpio.h</span><br><span>+++ b/src/soc/mediatek/mt8173/include/soc/gpio.h</span><br><span>@@ -369,44 +369,6 @@</span><br><span> void gpio_set_mode(gpio_t gpio, int mode);</span><br><span> void gpio_init(enum external_power);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-enum gpio_irq_type {</span><br><span style="color: hsl(0, 100%, 40%);">- IRQ_TYPE_EDGE_RISING,</span><br><span style="color: hsl(0, 100%, 40%);">- IRQ_TYPE_EDGE_FALLING,</span><br><span style="color: hsl(0, 100%, 40%);">- IRQ_TYPE_LEVEL_HIGH,</span><br><span style="color: hsl(0, 100%, 40%);">- IRQ_TYPE_LEVEL_LOW,</span><br><span style="color: hsl(0, 100%, 40%);">-};</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-struct eint_section {</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t regs[7];</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t align1[9];</span><br><span style="color: hsl(0, 100%, 40%);">-};</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-struct eint_regs {</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section sta;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section ack;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section mask;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section mask_set;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section mask_clr;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section sens;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section sens_set;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section sens_clr;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section soft;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section soft_set;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section soft_clr;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section rsv00;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section pol;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section pol_set;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section pol_clr;</span><br><span style="color: hsl(0, 100%, 40%);">- struct eint_section rsv01;</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t d0en[7];</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t rsv02;</span><br><span style="color: hsl(0, 100%, 40%);">- uint32_t d1en[7];</span><br><span style="color: hsl(0, 100%, 40%);">-};</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-check_member(eint_regs, d1en, 0x420);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static struct eint_regs *const mt8173_eint = (void *)(EINT_BASE);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /*</span><br><span> * Firmware never enables interrupts on this platform. This function</span><br><span> * reads current EINT status and clears the pending interrupt.</span><br><span>diff --git a/src/soc/mediatek/mt8183/include/soc/addressmap.h b/src/soc/mediatek/mt8183/include/soc/addressmap.h</span><br><span>index cee9bd8..23a6804 100644</span><br><span>--- a/src/soc/mediatek/mt8183/include/soc/addressmap.h</span><br><span>+++ b/src/soc/mediatek/mt8183/include/soc/addressmap.h</span><br><span>@@ -28,6 +28,7 @@</span><br><span> SPM_BASE = IO_PHYS + 0x00006000,</span><br><span> RGU_BASE = IO_PHYS + 0x00007000,</span><br><span> GPT_BASE = IO_PHYS + 0x00008000,</span><br><span style="color: hsl(120, 100%, 40%);">+ EINT_BASE = IO_PHYS + 0x0000B000,</span><br><span> APMIXED_BASE = IO_PHYS + 0x0000C000,</span><br><span> EMI_BASE = IO_PHYS + 0x00219000,</span><br><span> EMI_MPU_BASE = IO_PHYS + 0x00226000,</span><br><span>diff --git a/src/soc/mediatek/mt8183/include/soc/gpio.h b/src/soc/mediatek/mt8183/include/soc/gpio.h</span><br><span>index 1faab44..12a8c10 100644</span><br><span>--- a/src/soc/mediatek/mt8183/include/soc/gpio.h</span><br><span>+++ b/src/soc/mediatek/mt8183/include/soc/gpio.h</span><br><span>@@ -632,4 +632,17 @@</span><br><span> enum pull_select select);</span><br><span> void gpio_set_mode(gpio_t gpio, int mode);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Firmware never enables interrupts on this platform. This function</span><br><span style="color: hsl(120, 100%, 40%);">+ * reads current EINT status and clears the pending interrupt.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Returns 1 if the interrupt was pending, else 0.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+int gpio_eint_poll(gpio_t gpio);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Configure a GPIO to handle external interrupts (EINT) of given irq type.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/c/coreboot/+/29837">change 29837</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/c/coreboot/+/29837"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-Change-Id: Ib01b43cf1aa4082d7d968fe1ef82f75e8cf05b8b </div>
<div style="display:none"> Gerrit-Change-Number: 29837 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Tristan Hsieh <tristan.shieh@mediatek.com> </div>
<div style="display:none"> Gerrit-Reviewer: Julius Werner <jwerner@chromium.org> </div>
<div style="display:none"> Gerrit-Reviewer: Tristan Hsieh <tristan.shieh@mediatek.com> </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>