[coreboot-gerrit] Change in ...coreboot[master]: mb/google/dragonegg: Add initial mainboard code support

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29749 )

Change subject: mb/google/dragonegg: Add initial mainboard code support
......................................................................


Patch Set 9:

> > Patch Set 9:
 > >
 > > > Patch Set 9:
 > > >
 > > > > > > Please add Documentation for that board.
 > > >  > > > For example:
 > > >  > > > How to flash, required BLOBs, pictures if possible,
 > everything
 > > >  > > that
 > > >  > > > is useful for coreboot development.
 > > >  > >
 > > >  > > I will let Shelley to answer this question. As this is
 > early ICL
 > > >  > > silicon, i'm not sure about board availability to able to
 > build
 > > >  > at
 > > >  > > externally.
 > > >  >
 > > >  > That would be wonderful to have it in the Documentation :-).
 > > >
 > > > Patrick, do you have any sample documentation that can be
 > referred here
 > >
 > > Patrick,
 > >
 > > Flashing is the same as other Intel boards:
 > >
 > > $ dut-control spi2_vref:pp3300 spi2_buf_en:on spi2_buf_on_flex_en:on
 > warm_reset:on
 > > $ sudo flashrom -n -p ft2232_spi:type=servo-v2 -w <bios_image>
 > > $ dut-control spi2_vref:off spi2_buf_en:off spi2_buf_on_flex_en:off
 > warm_reset:off
 > >
 > > Sorry, I do not have the pointers to the blobs as they are in the
 > Intel VIP site and I can't post photos of the board as it is a
 > early development board.
 > 
 > How to write documentation can be found here:
 > https://doc.coreboot.org/getting_started/writing_documentation.html
 > 
 > Sample documentation can be found in git, here:
 > Documentation/mainboard/*/*.md
 > 
 > All those facts mentioned should go into the documentation.
 > Also:
 > Will it be available for purchase ?
 > Will it be available as reference platform for OEMs ?
 > Is it an internal project only ?

 > If the blobs aren't available, the code wont work at all, that
 > should be mentioned in the Documentation and fixed once the BLOBs
 > are available.

Patrick,

can you please let me know how you are building any Intel SoC based SKL or KBL based reference/customer chrome design today?

who provides you required ucode, me binaries and FSP binaries ? 

Consider the fact that ucode an ME binary release process will remain same for icl based platform and dragonegg is one of them.

For FSP binary release, i think there is already one process developed by Nate and Balaji to have github kind model where you will get FSP binaries after PRQ is done. 

i'm not sure, if past we have any board bring up document as such where we could write down those details and i could Shelley has replied earlier about documentation part. 

lets me know if you have any further question on binaries release process for ICL platforms.  

 > Are there schematics or other documents you can reference ?


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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9
Gerrit-Change-Number: 29749
Gerrit-PatchSet: 9
Gerrit-Owner: Shelley Chen <shchen at google.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro at das-labor.org>
Gerrit-Reviewer: Shelley Chen <shchen at google.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-CC: Frans Hendriks <fhendriks at eltan.com>
Gerrit-CC: HAOUAS Elyes <ehaouas at noos.fr>
Gerrit-Comment-Date: Thu, 22 Nov 2018 08:55:29 +0000
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