[coreboot-gerrit] Change in ...coreboot[master]: mb/intel/icelake_rvp: Configure eSPI IO decode range for EC
Aamir Bohra (Code Review)
gerrit at coreboot.org
Wed Nov 21 07:11:11 CET 2018
Hello Subrata Banik,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/29764
to review the following change.
Change subject: mb/intel/icelake_rvp: Configure eSPI IO decode range for EC
......................................................................
mb/intel/icelake_rvp: Configure eSPI IO decode range for EC
This implementation adds eSPI IO decode range for EC.
1. 0x800-0x8FF / 0x200-020F: EC host command range.
2. 0x900-0x9ff: EC memory map range.
Change-Id: I69e6b3a83c072036c5b3ae801f8d80dfda82478e
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
Signed-off-by: Aamir Bohra <aamir.bohra at intel.com>
---
M src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb
M src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb
2 files changed, 12 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/29764/1
diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb
index fb39b60..a57d91a 100644
--- a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb
+++ b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb
@@ -27,6 +27,12 @@
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)"
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)"
+ # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
+ register "gen1_dec" = "0x00fc0801"
+ register "gen2_dec" = "0x000c0201"
+ # EC memory map range is 0x900-0x9ff
+ register "gen3_dec" = "0x00fc0901"
+
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkHda" = "1"
diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb
index b3a7826..f8fbfb4 100644
--- a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb
+++ b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb
@@ -27,6 +27,12 @@
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)"
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)"
+ # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
+ register "gen1_dec" = "0x00fc0801"
+ register "gen2_dec" = "0x000c0201"
+ # EC memory map range is 0x900-0x9ff
+ register "gen3_dec" = "0x00fc0901"
+
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkHda" = "1"
register "PchHdaAudioLinkSsp0" = "1"
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I69e6b3a83c072036c5b3ae801f8d80dfda82478e
Gerrit-Change-Number: 29764
Gerrit-PatchSet: 1
Gerrit-Owner: Aamir Bohra <aamir.bohra at intel.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik at intel.com>
Gerrit-MessageType: newchange
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