[coreboot-gerrit] Change in coreboot[master]: mb/google/octopus: Set IOSTERM to 9 for interrupt pins

[Kane Chen (Code Review)]

Kane Chen has uploaded this change for review. ( https://review.coreboot.org/29645


Change subject: mb/google/octopus: Set IOSTERM to 9 for interrupt pins
......................................................................

mb/google/octopus: Set IOSTERM to 9 for interrupt pins

According to EDS and architect's suggestion, we should set IOSTERM to
9 for interrupt pins to avoid unexpected wakeup during s0ix.

BUG=b:113962641
TEST=verified pen and touchscreen are working even after s0ix
Signed-off-by: Kane Chen <kane.chen at intel.com>

Change-Id: Ib7fccf0656ffca8c212d2ccd168f53ed41887763
---
M src/mainboard/google/octopus/variants/baseboard/gpio.c
1 file changed, 5 insertions(+), 5 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/29645/1

diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c
index 8af11bf..6eafc1c 100644
--- a/src/mainboard/google/octopus/variants/baseboard/gpio.c
+++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c
@@ -104,9 +104,9 @@
 	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_74, UP_20K, DEEP, NF1, TxDRxE, ENPU), /* THERMTRIP_B */
 	PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_75, NONE, DEEP, NF1, TxDRxE, DISPUPD), /* PROCHOT_B */
 	PAD_NC(GPIO_211, UP_20K), /* EMMC_RST_B -- unused */
-	PAD_CFG_GPI_APIC_IOS(GPIO_212, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD), /* Touch Panel Int */
+	PAD_CFG_GPI_APIC_IOS(GPIO_212, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD), /* Touch Panel Int */
 	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_213, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), /* EN_PP3300_TOUCHSCREEN */
-	PAD_CFG_GPI_APIC_IOS(GPIO_214, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD), /* P_SENSOR_INT_L */
+	PAD_CFG_GPI_APIC_IOS(GPIO_214, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD), /* P_SENSOR_INT_L */
 
 	/* NORTH COMMUNITY GPIOS */
 
@@ -198,9 +198,9 @@
 	PAD_NC(GPIO_134, NONE),/* GPIO_134 -- unused */
 	PAD_CFG_GPI_IRQ_WAKE(GPIO_135, NONE, DEEP, LEVEL, INVERT),/* GPIO_135 -- TRACKPAD_INT1_1V8_ODL */
 	PAD_CFG_GPI_APIC_IOS(GPIO_136, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_136 -- PMIC_PCH_INT_ODL */
-	PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_137 -- HP_INT_ODL */
-	PAD_CFG_GPI_APIC_IOS(GPIO_138, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_138 -- PEN_PDCT_ODL */
-	PAD_CFG_GPI_APIC_IOS(GPIO_139, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_139 -- PEN_INT_ODL */
+	PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_137 -- HP_INT_ODL */
+	PAD_CFG_GPI_APIC_IOS(GPIO_138, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_138 -- PEN_PDCT_ODL */
+	PAD_CFG_GPI_APIC_IOS(GPIO_139, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD),/* GPIO_139 -- PEN_INT_ODL */
 	PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_140, 1, DEEP, NONE, Tx1RxDCRx0, DISPUPD),/* GPIO_140 -- PEN_RESET */
 	// Also we may be able to use eSPI WAKE# Virtual Wire instead
 	PAD_CFG_GPI_SCI_IOS(GPIO_141, NONE, DEEP, EDGE_SINGLE, INVERT, IGNORE, DISPUPD),/* GPIO_141 -- EC_PCH_WAKE_ODL */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib7fccf0656ffca8c212d2ccd168f53ed41887763
Gerrit-Change-Number: 29645
Gerrit-PatchSet: 1
Gerrit-Owner: Kane Chen <kane.chen at intel.com>
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