[coreboot-gerrit] Change in coreboot[master]: mb/emulation/qemu-i440fx|q35: Fixes and code cleanup
Patrick Rudolph (Code Review)
gerrit at coreboot.org
Sun Nov 11 11:01:56 CET 2018
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/29574
Change subject: mb/emulation/qemu-i440fx|q35: Fixes and code cleanup
......................................................................
mb/emulation/qemu-i440fx|q35: Fixes and code cleanup
Changes:
* Remove unused headers
* Link memory.c instead of including it
* Add memory.h for local functions
* Add romstage_main.c and link it
* Move DCACHE_RAM_BASE to 0x10000
* Set DCACHE_RAM_SIZE to 0x90000
* Clear DCACHE
* Set stack pointer to end of DCACHE
* Call mainboard_romstage_entry from romstage_main
* Code style fixes
Fixes:
* Console not working in romstage
Tested:
* qemu-2.11.2 target pc
* qemu-2.11.2 target q35
Change-Id: I2bc461b13332ec5885c33c87828a5fd023f8e730
Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
M src/mainboard/emulation/qemu-i440fx/Kconfig
M src/mainboard/emulation/qemu-i440fx/Makefile.inc
M src/mainboard/emulation/qemu-i440fx/acpi_tables.c
M src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
M src/mainboard/emulation/qemu-i440fx/mainboard.c
M src/mainboard/emulation/qemu-i440fx/memory.c
A src/mainboard/emulation/qemu-i440fx/memory.h
M src/mainboard/emulation/qemu-i440fx/northbridge.c
M src/mainboard/emulation/qemu-i440fx/romstage.c
A src/mainboard/emulation/qemu-i440fx/romstage_main.c
M src/mainboard/emulation/qemu-q35/Kconfig
M src/mainboard/emulation/qemu-q35/Makefile.inc
M src/mainboard/emulation/qemu-q35/mainboard.c
M src/mainboard/emulation/qemu-q35/romstage.c
14 files changed, 103 insertions(+), 58 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/29574/1
diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig
index fc56ab6..9450e2c 100644
--- a/src/mainboard/emulation/qemu-i440fx/Kconfig
+++ b/src/mainboard/emulation/qemu-i440fx/Kconfig
@@ -25,12 +25,15 @@
int
default 6
+# Skip the first 64KiB as coreboot table pointer is installed
+# at address 0
config DCACHE_RAM_BASE
hex
- default 0xd0000
+ default 0x10000
+# Memory at 0xa0000 decodes to VGA
config DCACHE_RAM_SIZE
hex
- default 0x10000
+ default 0x90000
endif # BOARD_EMULATION_QEMU_X86_I440FX
diff --git a/src/mainboard/emulation/qemu-i440fx/Makefile.inc b/src/mainboard/emulation/qemu-i440fx/Makefile.inc
index f9cf252..03a50fc 100644
--- a/src/mainboard/emulation/qemu-i440fx/Makefile.inc
+++ b/src/mainboard/emulation/qemu-i440fx/Makefile.inc
@@ -1,3 +1,7 @@
cpu_incs-y += $(src)/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
+romstage-y += romstage.c
ramstage-y += northbridge.c
ramstage-y += fw_cfg.c
+romstage-y += memory.c
+ramstage-y += memory.c
+romstage-y += romstage_main.c
diff --git a/src/mainboard/emulation/qemu-i440fx/acpi_tables.c b/src/mainboard/emulation/qemu-i440fx/acpi_tables.c
index f775901..abd2633 100644
--- a/src/mainboard/emulation/qemu-i440fx/acpi_tables.c
+++ b/src/mainboard/emulation/qemu-i440fx/acpi_tables.c
@@ -14,14 +14,11 @@
*/
#include <types.h>
-#include <string.h>
#include <arch/acpi.h>
#include <arch/ioapic.h>
#include <arch/acpigen.h>
#include <arch/smp/mpspec.h>
#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
#include "fw_cfg.h"
#include "acpi.h"
diff --git a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc b/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
index d36341c..3f71ce7 100644
--- a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
+++ b/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
@@ -37,9 +37,16 @@
* of big ramstages. The ramstage will load its own %esp so
* there is no harm in using this value.
*/
- movl $0xa0000, %eax
+ movl $(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE), %eax
movl %eax, %esp
+ /* Clear the cache memory region. This will also clear CAR GLOBAL */
+ movl $CONFIG_DCACHE_RAM_BASE, %esi
+ movl %esi, %edi
+ movl $(CONFIG_DCACHE_RAM_SIZE >> 2), %ecx
+ xorl %eax, %eax
+ rep stosl
+
/* Restore the BIST result. */
movl %ebp, %eax
movl %esp, %ebp
@@ -50,14 +57,6 @@
/* Call romstage.c main function. */
call romstage_main
- post_code(0x30)
-
-__main:
- post_code(POST_PREPARE_RAMSTAGE)
- cld /* Clear direction flag. */
-
- call copy_and_run
-
.Lhlt:
post_code(POST_DEAD_CODE)
hlt
diff --git a/src/mainboard/emulation/qemu-i440fx/mainboard.c b/src/mainboard/emulation/qemu-i440fx/mainboard.c
index b2439bb..4886fe1 100644
--- a/src/mainboard/emulation/qemu-i440fx/mainboard.c
+++ b/src/mainboard/emulation/qemu-i440fx/mainboard.c
@@ -16,10 +16,8 @@
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <pc80/keyboard.h>
-#include <arch/io.h>
static const unsigned char qemu_i440fx_irqs[] = {
11, 10, 10, 11,
diff --git a/src/mainboard/emulation/qemu-i440fx/memory.c b/src/mainboard/emulation/qemu-i440fx/memory.c
index b8109e5..dea96f2 100644
--- a/src/mainboard/emulation/qemu-i440fx/memory.c
+++ b/src/mainboard/emulation/qemu-i440fx/memory.c
@@ -14,6 +14,8 @@
*/
#include <cbmem.h>
+#include <arch/io.h>
+#include "memory.h"
#define CMOS_ADDR_PORT 0x70
#define CMOS_DATA_PORT 0x71
@@ -25,12 +27,24 @@
#define MID_HIGHRAM_ADDR 0x5c
#define LOW_HIGHRAM_ADDR 0x5b
-static unsigned long qemu_get_memory_size(void)
+unsigned long qemu_get_high_memory_size(void)
+{
+ unsigned long high;
+ outb(HIGH_HIGHRAM_ADDR, CMOS_ADDR_PORT);
+ high = ((unsigned long) inb(CMOS_DATA_PORT)) << 22;
+ outb(MID_HIGHRAM_ADDR, CMOS_ADDR_PORT);
+ high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
+ outb(LOW_HIGHRAM_ADDR, CMOS_ADDR_PORT);
+ high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
+ return high;
+}
+
+unsigned long qemu_get_memory_size(void)
{
unsigned long tomk;
- outb (HIGH_RAM_ADDR, CMOS_ADDR_PORT);
+ outb(HIGH_RAM_ADDR, CMOS_ADDR_PORT);
tomk = ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
- outb (LOW_RAM_ADDR, CMOS_ADDR_PORT);
+ outb(LOW_RAM_ADDR, CMOS_ADDR_PORT);
tomk |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
tomk += 16 * 1024;
return tomk;
diff --git a/src/mainboard/emulation/qemu-i440fx/memory.h b/src/mainboard/emulation/qemu-i440fx/memory.h
new file mode 100644
index 0000000..d3b21a6
--- /dev/null
+++ b/src/mainboard/emulation/qemu-i440fx/memory.h
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2004 Stefan Reinauer <stefan.reinauer at coreboot.org>
+ * Copyright (C) 2018 Patrick Rudolph <siro at das-labor.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+#ifndef __QEMU_MEMORY_H_
+#define __QEMU_MEMORY_H_
+
+unsigned long qemu_get_high_memory_size(void);
+unsigned long qemu_get_memory_size(void);
+
+#endif
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c
index aa309de..9d9225c 100644
--- a/src/mainboard/emulation/qemu-i440fx/northbridge.c
+++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c
@@ -21,28 +21,14 @@
#include <device/pci.h>
#include <stdlib.h>
#include <string.h>
-#include <delay.h>
#include <smbios.h>
-#include <cbmem.h>
+#include "memory.h"
#include "fw_cfg.h"
#include "fw_cfg_if.h"
-#include "memory.c"
#include "acpi.h"
-static unsigned long qemu_get_high_memory_size(void)
-{
- unsigned long high;
- outb (HIGH_HIGHRAM_ADDR, CMOS_ADDR_PORT);
- high = ((unsigned long) inb(CMOS_DATA_PORT)) << 22;
- outb (MID_HIGHRAM_ADDR, CMOS_ADDR_PORT);
- high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 14;
- outb (LOW_HIGHRAM_ADDR, CMOS_ADDR_PORT);
- high |= ((unsigned long) inb(CMOS_DATA_PORT)) << 6;
- return high;
-}
-
static void qemu_reserve_ports(struct device *dev, unsigned int idx,
unsigned int base, unsigned int size,
const char *name)
diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c
index ce12a8b..9b573f4 100644
--- a/src/mainboard/emulation/qemu-i440fx/romstage.c
+++ b/src/mainboard/emulation/qemu-i440fx/romstage.c
@@ -14,10 +14,7 @@
*/
#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
+#include <cbmem.h>
#include <console/console.h>
#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
@@ -25,9 +22,7 @@
#include <delay.h>
#include <cpu/x86/lapic.h>
-#include "memory.c"
-
-void *asmlinkage romstage_main(unsigned long bist)
+void mainboard_romstage_entry(unsigned long bist)
{
int cbmem_was_initted;
@@ -43,7 +38,4 @@
timestamp_init(timestamp_get());
timestamp_add_now(TS_START_ROMSTAGE);
-
- /* Emulation uses fixed low stack during ramstage. */
- return NULL;
}
diff --git a/src/mainboard/emulation/qemu-i440fx/romstage_main.c b/src/mainboard/emulation/qemu-i440fx/romstage_main.c
new file mode 100644
index 0000000..15e7f56
--- /dev/null
+++ b/src/mainboard/emulation/qemu-i440fx/romstage_main.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2004 Stefan Reinauer
+ * Copyright (C) 2018 Patrick Rudolph <siro at das-labor.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cpu/intel/romstage.h>
+#include <console/console.h>
+#include <program_loading.h>
+
+asmlinkage void *romstage_main(unsigned long bist)
+{
+ mainboard_romstage_entry(bist);
+
+ post_code(0x30);
+
+ run_ramstage();
+
+ /* We do not return. */
+ return NULL;
+}
diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig
index 10b5a93..faf017a 100644
--- a/src/mainboard/emulation/qemu-q35/Kconfig
+++ b/src/mainboard/emulation/qemu-q35/Kconfig
@@ -28,13 +28,16 @@
hex
default 0xb0000000
+# Skip the first 64KiB as coreboot table pointer is installed
+# at address 0
config DCACHE_RAM_BASE
hex
- default 0xd0000
+ default 0x10000
+# Memory at 0xa0000 decodes to VGA
config DCACHE_RAM_SIZE
hex
- default 0x10000
+ default 0x90000
# Do not show IFD/blob options since QEMU doesn't care
config HAVE_INTEL_FIRMWARE
diff --git a/src/mainboard/emulation/qemu-q35/Makefile.inc b/src/mainboard/emulation/qemu-q35/Makefile.inc
index fc4374c..df6e628 100644
--- a/src/mainboard/emulation/qemu-q35/Makefile.inc
+++ b/src/mainboard/emulation/qemu-q35/Makefile.inc
@@ -1,3 +1,6 @@
cpu_incs-y += $(src)/mainboard/emulation/qemu-i440fx/cache_as_ram.inc
ramstage-y += ../qemu-i440fx/northbridge.c
+ramstage-y += ../qemu-i440fx/memory.c
ramstage-y += ../qemu-i440fx/fw_cfg.c
+romstage-y += ../qemu-i440fx/memory.c
+romstage-y += ../qemu-i440fx/romstage_main.c
diff --git a/src/mainboard/emulation/qemu-q35/mainboard.c b/src/mainboard/emulation/qemu-q35/mainboard.c
index 354450b..f89b0a8 100644
--- a/src/mainboard/emulation/qemu-q35/mainboard.c
+++ b/src/mainboard/emulation/qemu-q35/mainboard.c
@@ -19,7 +19,6 @@
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <pc80/keyboard.h>
-#include <arch/io.h>
#include <drivers/intel/gma/i915.h>
#define Q35_PAM0 0x90
diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c
index 870dd07..3be8e03 100644
--- a/src/mainboard/emulation/qemu-q35/romstage.c
+++ b/src/mainboard/emulation/qemu-q35/romstage.c
@@ -14,22 +14,17 @@
*/
#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <pc80/mc146818rtc.h>
#include <console/console.h>
#include <southbridge/intel/i82801ix/i82801ix.h>
#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
#include <timestamp.h>
#include <delay.h>
+#include <cbmem.h>
#include <cpu/x86/lapic.h>
+#include "../qemu-i440fx/memory.h"
-#include "../qemu-i440fx/memory.c"
-
-void * asmlinkage romstage_main(unsigned long bist)
+void mainboard_romstage_entry(unsigned long bist)
{
int cbmem_was_initted;
@@ -46,7 +41,4 @@
timestamp_init(timestamp_get());
timestamp_add_now(TS_START_ROMSTAGE);
-
- /* Emulation uses fixed low stack during ramstage. */
- return NULL;
}
--
To view, visit https://review.coreboot.org/29574
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I2bc461b13332ec5885c33c87828a5fd023f8e730
Gerrit-Change-Number: 29574
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <siro at das-labor.org>
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