[coreboot-gerrit] Change in coreboot[master]: siemens/mc_apl3: Set Full Reset Bit into Reset Control Register

[Mario Scheithauer (Code Review)]

Hello Werner Zeh, build bot (Jenkins), 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/29530

to look at the new patch set (#2).

Change subject: siemens/mc_apl3: Set Full Reset Bit into Reset Control Register
......................................................................

siemens/mc_apl3: Set Full Reset Bit into Reset Control Register

This mainboard provides customer hardware reset button. A feature of
this button is that it holds the APL in reset state as long as the reset
button is pressed. After releasing the reset button the APL should
restart again without the need for a power cycle. When Bit 3 in Reset
Control Register (I/O port CF9h) is set to 1 and then the reset button
is pressed the PCH will drive SLP_S3 active (low).

Change-Id: Ib842f15b6ba14851d7f9b1b97c83389adc61f50b
Signed-off-by: Mario Scheithauer <mario.scheithauer at siemens.com>
---
M src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c
1 file changed, 8 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/29530/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ib842f15b6ba14851d7f9b1b97c83389adc61f50b
Gerrit-Change-Number: 29530
Gerrit-PatchSet: 2
Gerrit-Owner: Mario Scheithauer <mario.scheithauer at siemens.com>
Gerrit-Reviewer: Werner Zeh <werner.zeh at siemens.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
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