[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add SSID header

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/29490


Change subject: soc/intel/common: Add SSID header
......................................................................

soc/intel/common: Add SSID header

CoffeeLake and newer FSP have provied an entry (SiSsidTablePtr and
SiNumberOfSsidTableEntry) to update internal devices SSID/SVID. Have
table format definied here for future usage.

Change-Id: I4bdabdd927fa477821f400e49c5787f405d0a9ea
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
A src/soc/intel/common/ssid.h
1 file changed, 46 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/29490/1

diff --git a/src/soc/intel/common/ssid.h b/src/soc/intel/common/ssid.h
new file mode 100644
index 0000000..da32e24
--- /dev/null
+++ b/src/soc/intel/common/ssid.h
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SOC_INTEL_COMMON_SSID_H
+#define SOC_INTEL_COMMON_SSID_H
+
+/* Subsystem Vendor ID / Subsystem ID */
+typedef struct {
+	uint16_t svid;
+	uint16_t ssid;
+} svid_ssid_val;
+
+/*
+ *  Below defination to match PCI_SEGMENT_LIB_ADDRESS (),
+ *  which can send to PciSegmentRead/Write functions directly.
+ */
+typedef struct {
+	union {
+		struct {
+			uint64_t Register:12;
+			uint64_t Function:3;
+			uint64_t Device:5;
+			uint64_t Bus:8;
+			uint64_t Reserved1:4;
+			uint64_t Segment:16;
+			uint64_t Reserved2:16;
+		} Bits;
+		uint64_t SegBusDevFuncRegister;
+	} Address;
+	svid_ssid_val SvidSidValue;
+	uint32_t Reserved;
+} svid_ssid_init_entry;
+
+#endif /* SOC_INTEL_COMMON_SSID_H */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4bdabdd927fa477821f400e49c5787f405d0a9ea
Gerrit-Change-Number: 29490
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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