[coreboot-gerrit] Change in coreboot[master]: mainboard/amd/south_station: Fix coding style
build bot (Jenkins) (Code Review)
gerrit at coreboot.org
Tue May 29 21:45:50 CEST 2018
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26466 )
Change subject: mainboard/amd/south_station: Fix coding style
......................................................................
Patch Set 2:
(12 comments)
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/BiosCallOuts.c
File src/mainboard/amd/south_station/BiosCallOuts.c:
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/BiosCallOuts.c@24
PS2, Line 24: VOID *ConfigPtr);
need consistent spacing around '*' (ctx:WxV)
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/BiosCallOuts.c@157
PS2, Line 157: Write64Mem8(GpioMmioAddr + SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21
line over 80 characters
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/BiosCallOuts.c@163
PS2, Line 163: Write64Mem8(GpioMmioAddr + SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21
line over 80 characters
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/BiosCallOuts.c@173
PS2, Line 173: Write64Mem8(GpioMmioAddr + SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25
line over 80 characters
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/BiosCallOuts.c@179
PS2, Line 179: Write64Mem8(GpioMmioAddr + SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25
line over 80 characters
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/BiosCallOuts.c@189
PS2, Line 189: Write64Mem8(GpioMmioAddr + SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
line over 80 characters
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/BiosCallOuts.c@195
PS2, Line 195: Write64Mem8(GpioMmioAddr + SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02
line over 80 characters
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/OemCustomize.c
File src/mainboard/amd/south_station/OemCustomize.c:
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/OemCustomize.c@60
PS2, Line 60: }
Statements should start on a tabstop
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/OemCustomize.c@75
PS2, Line 75: }
Statements should start on a tabstop
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/mptable.c
File src/mainboard/amd/south_station/mptable.c:
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/mptable.c@26
PS2, Line 26: [0x00] = 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, /* INTA# - INTH# */
line over 80 characters
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/mptable.c@27
PS2, Line 27: [0x08] = 0x00, 0x00, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F, /* Misc-nil,0,1,2, INT from Serial irq */
line over 80 characters
https://review.coreboot.org/#/c/26466/2/src/mainboard/amd/south_station/mptable.c@81
PS2, Line 81: smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin))
line over 80 characters
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Iae457237ef104736478eface4d91dd282fd866ea
Gerrit-Change-Number: 26466
Gerrit-PatchSet: 2
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 29 May 2018 19:45:50 +0000
Gerrit-HasComments: Yes
Gerrit-HasLabels: No
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