[coreboot-gerrit] Change in coreboot[master]: src/sb/intel/common/spi.c: Adapt and link in romstage

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25414 )

Change subject: src/sb/intel/common/spi.c: Adapt and link in romstage
......................................................................


Patch Set 3:

(2 comments)

https://review.coreboot.org/#/c/25414/3/src/southbridge/intel/common/spi.c
File src/southbridge/intel/common/spi.c:

https://review.coreboot.org/#/c/25414/3/src/southbridge/intel/common/spi.c@321
PS3, Line 321: 		car_set_var(g_ichspi_lock, readw_(&ich7_spi->spis) & HSFS_FLOCKDN);
line over 80 characters


https://review.coreboot.org/#/c/25414/3/src/southbridge/intel/common/spi.c@957
PS3, Line 957: 	writel_ (0x1000, &cntlr->ich9_spi->fdoc);
space prohibited between function name and open parenthesis '('



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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I4671653c0b07ab5c4bf91128f18f142ce4f893cf
Gerrit-Change-Number: 25414
Gerrit-PatchSet: 3
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
Gerrit-Reviewer: Christoph Pomaska <cp_public at posteo.de>
Gerrit-Reviewer: Paul Menzel <paulepanter at users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply at coreboot.org>
Gerrit-Comment-Date: Tue, 29 May 2018 15:20:33 +0000
Gerrit-HasComments: Yes
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