[coreboot-gerrit] Change in coreboot[master]: src/drivers: Get rid of whitespace before tab
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Mon May 28 15:48:53 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26649
Change subject: src/drivers: Get rid of whitespace before tab
......................................................................
src/drivers: Get rid of whitespace before tab
Change-Id: Ia9ca055679c0332613afb2bb2ed86df165de3baf
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/drivers/amd/agesa/acpi_tables.c
M src/drivers/aspeed/common/ast_tables.h
M src/drivers/ati/ragexl/atyfb.h
M src/drivers/ati/ragexl/fb.h
M src/drivers/ati/ragexl/xlinit.c
M src/drivers/generic/gpio_keys/gpio_keys.c
M src/drivers/intel/fsp1_0/fsp_util.c
M src/drivers/intel/fsp1_1/cache_as_ram.inc
M src/drivers/intel/gma/acpi.c
M src/drivers/intel/gma/i915_reg.h
M src/drivers/net/ne2k.c
M src/drivers/xgi/common/initdef.h
M src/drivers/xgi/common/vstruct.h
13 files changed, 114 insertions(+), 114 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/26649/1
diff --git a/src/drivers/amd/agesa/acpi_tables.c b/src/drivers/amd/agesa/acpi_tables.c
index 5335c02..2f0cde8 100644
--- a/src/drivers/amd/agesa/acpi_tables.c
+++ b/src/drivers/amd/agesa/acpi_tables.c
@@ -26,11 +26,11 @@
IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI_00630F01) || \
IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI_00730F01)
-#define HAS_ACPI_SRAT TRUE
-#define HAS_ACPI_SLIT TRUE
+#define HAS_ACPI_SRAT TRUE
+#define HAS_ACPI_SLIT TRUE
#else
-#define HAS_ACPI_SRAT FALSE
-#define HAS_ACPI_SLIT FALSE
+#define HAS_ACPI_SRAT FALSE
+#define HAS_ACPI_SLIT FALSE
#endif
/* We will reference AmdLateParams later to copy ACPI tables. */
diff --git a/src/drivers/aspeed/common/ast_tables.h b/src/drivers/aspeed/common/ast_tables.h
index 3608d5a..318a9b8 100644
--- a/src/drivers/aspeed/common/ast_tables.h
+++ b/src/drivers/aspeed/common/ast_tables.h
@@ -49,53 +49,53 @@
#define SyncNN (NVSync | NHSync)
/* DCLK Index */
-#define VCLK25_175 0x00
-#define VCLK28_322 0x01
-#define VCLK31_5 0x02
-#define VCLK36 0x03
-#define VCLK40 0x04
-#define VCLK49_5 0x05
-#define VCLK50 0x06
-#define VCLK56_25 0x07
-#define VCLK65 0x08
-#define VCLK75 0x09
-#define VCLK78_75 0x0A
-#define VCLK94_5 0x0B
-#define VCLK108 0x0C
-#define VCLK135 0x0D
-#define VCLK157_5 0x0E
-#define VCLK162 0x0F
-/* #define VCLK193_25 0x10 */
-#define VCLK154 0x10
-#define VCLK83_5 0x11
-#define VCLK106_5 0x12
-#define VCLK146_25 0x13
-#define VCLK148_5 0x14
-#define VCLK71 0x15
-#define VCLK88_75 0x16
-#define VCLK119 0x17
-#define VCLK85_5 0x18
-#define VCLK97_75 0x19
+#define VCLK25_175 0x00
+#define VCLK28_322 0x01
+#define VCLK31_5 0x02
+#define VCLK36 0x03
+#define VCLK40 0x04
+#define VCLK49_5 0x05
+#define VCLK50 0x06
+#define VCLK56_25 0x07
+#define VCLK65 0x08
+#define VCLK75 0x09
+#define VCLK78_75 0x0A
+#define VCLK94_5 0x0B
+#define VCLK108 0x0C
+#define VCLK135 0x0D
+#define VCLK157_5 0x0E
+#define VCLK162 0x0F
+/* #define VCLK193_25 0x10 */
+#define VCLK154 0x10
+#define VCLK83_5 0x11
+#define VCLK106_5 0x12
+#define VCLK146_25 0x13
+#define VCLK148_5 0x14
+#define VCLK71 0x15
+#define VCLK88_75 0x16
+#define VCLK119 0x17
+#define VCLK85_5 0x18
+#define VCLK97_75 0x19
#define VCLK118_25 0x1A
static struct ast_vbios_dclk_info dclk_table[] = {
{0x2C, 0xE7, 0x03}, /* 00: VCLK25_175 */
{0x95, 0x62, 0x03}, /* 01: VCLK28_322 */
{0x67, 0x63, 0x01}, /* 02: VCLK31_5 */
- {0x76, 0x63, 0x01}, /* 03: VCLK36 */
- {0xEE, 0x67, 0x01}, /* 04: VCLK40 */
- {0x82, 0x62, 0x01}, /* 05: VCLK49_5 */
- {0xC6, 0x64, 0x01}, /* 06: VCLK50 */
- {0x94, 0x62, 0x01}, /* 07: VCLK56_25 */
- {0x80, 0x64, 0x00}, /* 08: VCLK65 */
- {0x7B, 0x63, 0x00}, /* 09: VCLK75 */
- {0x67, 0x62, 0x00}, /* 0A: VCLK78_75 */
- {0x7C, 0x62, 0x00}, /* 0B: VCLK94_5 */
- {0x8E, 0x62, 0x00}, /* 0C: VCLK108 */
- {0x85, 0x24, 0x00}, /* 0D: VCLK135 */
- {0x67, 0x22, 0x00}, /* 0E: VCLK157_5 */
- {0x6A, 0x22, 0x00}, /* 0F: VCLK162 */
- {0x4d, 0x4c, 0x80}, /* 10: VCLK154 */
+ {0x76, 0x63, 0x01}, /* 03: VCLK36 */
+ {0xEE, 0x67, 0x01}, /* 04: VCLK40 */
+ {0x82, 0x62, 0x01}, /* 05: VCLK49_5 */
+ {0xC6, 0x64, 0x01}, /* 06: VCLK50 */
+ {0x94, 0x62, 0x01}, /* 07: VCLK56_25 */
+ {0x80, 0x64, 0x00}, /* 08: VCLK65 */
+ {0x7B, 0x63, 0x00}, /* 09: VCLK75 */
+ {0x67, 0x62, 0x00}, /* 0A: VCLK78_75 */
+ {0x7C, 0x62, 0x00}, /* 0B: VCLK94_5 */
+ {0x8E, 0x62, 0x00}, /* 0C: VCLK108 */
+ {0x85, 0x24, 0x00}, /* 0D: VCLK135 */
+ {0x67, 0x22, 0x00}, /* 0E: VCLK157_5 */
+ {0x6A, 0x22, 0x00}, /* 0F: VCLK162 */
+ {0x4d, 0x4c, 0x80}, /* 10: VCLK154 */
{0xa7, 0x78, 0x80}, /* 11: VCLK83.5 */
{0x28, 0x49, 0x80}, /* 12: VCLK106.5 */
{0x37, 0x49, 0x80}, /* 13: VCLK146.25 */
diff --git a/src/drivers/ati/ragexl/atyfb.h b/src/drivers/ati/ragexl/atyfb.h
index df8dd3d..54a7147 100644
--- a/src/drivers/ati/ragexl/atyfb.h
+++ b/src/drivers/ati/ragexl/atyfb.h
@@ -234,7 +234,7 @@
{
/* Hack for bloc 1, should be cleanly optimized by compiler */
if (regindex >= 0x400)
- regindex -= 0x800;
+ regindex -= 0x800;
#if defined(__mc68000__)
return le16_to_cpu(*((volatile u16 *)(info->ati_regbase+regindex)));
@@ -248,7 +248,7 @@
{
/* Hack for bloc 1, should be cleanly optimized by compiler */
if (regindex >= 0x400)
- regindex -= 0x800;
+ regindex -= 0x800;
#if defined(__mc68000__)
*((volatile u16 *)(info->ati_regbase+regindex)) = cpu_to_le16(val);
@@ -338,7 +338,7 @@
union aty_pll *pll);
#if 0
u32 (*pll_to_var)(const struct fb_info_aty *info,
- const union aty_pll *pll);
+ const union aty_pll *pll);
void (*set_pll)(const struct fb_info_aty *info, const union aty_pll *pll);
#endif
};
diff --git a/src/drivers/ati/ragexl/fb.h b/src/drivers/ati/ragexl/fb.h
index 8daf7ba..214092e 100644
--- a/src/drivers/ati/ragexl/fb.h
+++ b/src/drivers/ati/ragexl/fb.h
@@ -237,7 +237,7 @@
struct fb_monspecs {
u32 hfmin; /* hfreq lower limit (Hz) */
- u32 hfmax; /* hfreq upper limit (Hz) */
+ u32 hfmax; /* hfreq upper limit (Hz) */
u16 vfmin; /* vfreq lower limit (Hz) */
u16 vfmax; /* vfreq upper limit (Hz) */
unsigned dpms : 1; /* supports DPMS */
diff --git a/src/drivers/ati/ragexl/xlinit.c b/src/drivers/ati/ragexl/xlinit.c
index c5d4404..d54679d 100644
--- a/src/drivers/ati/ragexl/xlinit.c
+++ b/src/drivers/ati/ragexl/xlinit.c
@@ -4,7 +4,7 @@
*
* Copyright (C) 2002 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
- * stevel at mvista.com or source at mvista.com
+ * stevel at mvista.com or source at mvista.com
* Copyright (C) 2004 Tyan Computer.
* Auther: Yinghai Lu yhlu at tyan.com
* move to coreboot
@@ -492,15 +492,15 @@
static void ati_ragexl_init(struct device *dev)
{
u32 chip_id;
- int j;
- u16 type;
+ int j;
+ u16 type;
u8 rev;
- const char *chipname = NULL;
+ const char *chipname = NULL;
#if CONFIG_CONSOLE_BTEXT
u32 i;
const char *xtal;
#endif
- int pll, mclk, xclk;
+ int pll, mclk, xclk;
#if CONFIG_CONSOLE_BTEXT
@@ -556,38 +556,38 @@
printk(BIOS_DEBUG, "ati_regbase = 0x%p, frame_buffer = 0x%08x\n", info->ati_regbase, info->frame_buffer);
#endif
- chip_id = aty_ld_le32(CFG_CHIP_ID, info);
- type = chip_id & CFG_CHIP_TYPE;
- rev = (chip_id & CFG_CHIP_REV)>>24;
- for (j = 0; j < ARRAY_SIZE(aty_chips); j++)
- if (type == aty_chips[j].chip_type &&
- (rev & aty_chips[j].rev_mask) == aty_chips[j].rev_val) {
- chipname = aty_chips[j].name;
- pll = aty_chips[j].pll;
- mclk = aty_chips[j].mclk;
- xclk = aty_chips[j].xclk;
- info->features = aty_chips[j].features;
- goto found;
+ chip_id = aty_ld_le32(CFG_CHIP_ID, info);
+ type = chip_id & CFG_CHIP_TYPE;
+ rev = (chip_id & CFG_CHIP_REV)>>24;
+ for (j = 0; j < ARRAY_SIZE(aty_chips); j++)
+ if (type == aty_chips[j].chip_type &&
+ (rev & aty_chips[j].rev_mask) == aty_chips[j].rev_val) {
+ chipname = aty_chips[j].name;
+ pll = aty_chips[j].pll;
+ mclk = aty_chips[j].mclk;
+ xclk = aty_chips[j].xclk;
+ info->features = aty_chips[j].features;
+ goto found;
}
- printk(BIOS_SPEW, "ati_ragexl_init: Unknown mach64 0x%04x rev 0x%04x\n", type, rev);
- return ;
+ printk(BIOS_SPEW, "ati_ragexl_init: Unknown mach64 0x%04x rev 0x%04x\n", type, rev);
+ return ;
found:
- printk(BIOS_INFO, "ati_ragexl_init: %s [0x%04x rev 0x%02x]\n", chipname, type, rev);
+ printk(BIOS_INFO, "ati_ragexl_init: %s [0x%04x rev 0x%02x]\n", chipname, type, rev);
#if 0
- if (M64_HAS(INTEGRATED)) {
- /* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
- if (mclk == 67 && info->ram_type < SDRAM)
- mclk = 63;
- }
+ if (M64_HAS(INTEGRATED)) {
+ /* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
+ if (mclk == 67 && info->ram_type < SDRAM)
+ mclk = 63;
+ }
#endif
#if CONFIG_CONSOLE_BTEXT
aty_calc_mem_refresh(info, type, xclk);
#endif /* CONFIG_CONSOLE_BTEXT */
- info->pll_per = 1000000/pll;
- info->mclk_per = 1000000/mclk;
- info->xclk_per = 1000000/xclk;
+ info->pll_per = 1000000/pll;
+ info->mclk_per = 1000000/mclk;
+ info->xclk_per = 1000000/xclk;
// info->dac_ops = &aty_dac_ct;
// info->pll_ops = &aty_pll_ct;
@@ -601,21 +601,21 @@
info->ram_type = (aty_ld_le32(CFG_STAT0, info) & 0x07);
info->ref_clk_per = 1000000000000ULL/14318180;
- xtal = "14.31818";
+ xtal = "14.31818";
#if 0
- if (M64_HAS(GTB_DSP) && (pll_ref_div = aty_ld_pll(PLL_REF_DIV, info))) {
- int diff1, diff2;
- diff1 = 510*14/pll_ref_div-pll;
- diff2 = 510*29/pll_ref_div-pll;
- if (diff1 < 0)
- diff1 = -diff1;
- if (diff2 < 0)
- diff2 = -diff2;
- if (diff2 < diff1) {
- info->ref_clk_per = 1000000000000ULL/29498928;
- xtal = "29.498928";
- }
- }
+ if (M64_HAS(GTB_DSP) && (pll_ref_div = aty_ld_pll(PLL_REF_DIV, info))) {
+ int diff1, diff2;
+ diff1 = 510*14/pll_ref_div-pll;
+ diff2 = 510*29/pll_ref_div-pll;
+ if (diff1 < 0)
+ diff1 = -diff1;
+ if (diff2 < 0)
+ diff2 = -diff2;
+ if (diff2 < diff1) {
+ info->ref_clk_per = 1000000000000ULL/29498928;
+ xtal = "29.498928";
+ }
+ }
#endif
i = aty_ld_le32(MEM_CNTL, info);
diff --git a/src/drivers/generic/gpio_keys/gpio_keys.c b/src/drivers/generic/gpio_keys/gpio_keys.c
index cbaf8cf..6120981 100644
--- a/src/drivers/generic/gpio_keys/gpio_keys.c
+++ b/src/drivers/generic/gpio_keys/gpio_keys.c
@@ -85,7 +85,7 @@
acpi_dp_add_string(dsd, "compatible", drv_string);
if (config->is_polled)
acpi_dp_add_integer(dsd, "poll-interval",
- config->poll_interval);
+ config->poll_interval);
/* Child device defining key */
child = gpio_keys_add_child_node(config, path);
if (child)
@@ -112,8 +112,8 @@
static struct device_operations gpio_keys_ops = {
.read_resources = DEVICE_NOOP,
- .set_resources = DEVICE_NOOP,
- .enable_resources = DEVICE_NOOP,
+ .set_resources = DEVICE_NOOP,
+ .enable_resources = DEVICE_NOOP,
.acpi_name = &gpio_keys_acpi_name,
.acpi_fill_ssdt_generator = &gpio_keys_fill_ssdt_generator,
};
diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c
index 17b2fd4..5a6321d 100644
--- a/src/drivers/intel/fsp1_0/fsp_util.c
+++ b/src/drivers/intel/fsp1_0/fsp_util.c
@@ -113,7 +113,7 @@
);
#else
volatile u8 *fsp_ptr;
-#endif /* __PRE_RAM__ */
+#endif /* __PRE_RAM__ */
/* The FSP is stored in CBFS */
fsp_ptr = (u8 *) CONFIG_FSP_LOC;
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc
index fc66208..af6f3a9 100644
--- a/src/drivers/intel/fsp1_1/cache_as_ram.inc
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc
@@ -131,7 +131,7 @@
movd %mm1, %eax
pushl %eax /* tsc[63:32] */
movd %mm0, %eax
- pushl %eax /* tsc[31:0] */
+ pushl %eax /* tsc[31:0] */
pushl %esp /* pointer to cache_as_ram_params */
/* Save FSP_INFO_HEADER location in ebx */
diff --git a/src/drivers/intel/gma/acpi.c b/src/drivers/intel/gma/acpi.c
index f62e8ee..65117aa 100644
--- a/src/drivers/intel/gma/acpi.c
+++ b/src/drivers/intel/gma/acpi.c
@@ -72,7 +72,7 @@
/*
Method (_BCL, 0, NotSerialized)
{
- Return (^^XBCL())
+ Return (^^XBCL())
}
*/
acpigen_write_method("_BCL", 0);
@@ -83,7 +83,7 @@
/*
Method (_BCM, 1, NotSerialized)
{
- ^^XBCM(Arg0)
+ ^^XBCM(Arg0)
}
*/
acpigen_write_method("_BCM", 1);
@@ -94,7 +94,7 @@
/*
Method (_BQC, 0, NotSerialized)
{
- Return (^^XBQC())
+ Return (^^XBQC())
}
*/
acpigen_write_method("_BQC", 0);
diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h
index ae774a5..d554874 100644
--- a/src/drivers/intel/gma/i915_reg.h
+++ b/src/drivers/intel/gma/i915_reg.h
@@ -242,9 +242,9 @@
#define MI_BATCH_BUFFER MI_INSTR(0x30, 1)
#define MI_BATCH_NON_SECURE (1)
/* for snb/ivb/vlv this also means "batch in ppgtt" when ppgtt is enabled. */
-#define MI_BATCH_NON_SECURE_I965 (1<<8)
+#define MI_BATCH_NON_SECURE_I965 (1<<8)
#define MI_BATCH_PPGTT_HSW (1<<8)
-#define MI_BATCH_NON_SECURE_HSW (1<<13)
+#define MI_BATCH_NON_SECURE_HSW (1<<13)
#define MI_BATCH_BUFFER_START MI_INSTR(0x31, 0)
#define MI_BATCH_GTT (2<<6) /* aliased with (1<<7) on gen4 */
#define MI_SEMAPHORE_MBOX MI_INSTR(0x16, 1) /* gen6+ */
diff --git a/src/drivers/net/ne2k.c b/src/drivers/net/ne2k.c
index bec1d78..9614296 100644
--- a/src/drivers/net/ne2k.c
+++ b/src/drivers/net/ne2k.c
@@ -437,7 +437,7 @@
res->gran = 5;
res->limit = res->base + res->size - 1;
res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_STORED |
- IORESOURCE_ASSIGNED;
+ IORESOURCE_ASSIGNED;
return;
}
diff --git a/src/drivers/xgi/common/initdef.h b/src/drivers/xgi/common/initdef.h
index 0195757..02250e8 100644
--- a/src/drivers/xgi/common/initdef.h
+++ b/src/drivers/xgi/common/initdef.h
@@ -42,7 +42,7 @@
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * Author: Thomas Winischhofer <thomas at winischhofer.net>
+ * Author: Thomas Winischhofer <thomas at winischhofer.net>
*
*/
@@ -80,7 +80,7 @@
#define VB_SIS307T 0x0080
#define VB_SIS307LV 0x0100
#define VB_UMC 0x4000
-#define VB_NoLCD 0x8000
+#define VB_NoLCD 0x8000
#define VB_SIS30xB (VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
#define VB_SIS30xC (VB_SIS301C | VB_SIS307T)
#define VB_SISTMDS (VB_SIS301 | VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
@@ -110,10 +110,10 @@
#define SetCRT2ToSCART 0x0010
#define SetCRT2ToLCD 0x0020
#define SetCRT2ToRAMDAC 0x0040
-#define SetCRT2ToHiVision 0x0080 /* for SiS bridge */
-#define SetCRT2ToCHYPbPr SetCRT2ToHiVision /* for Chrontel */
+#define SetCRT2ToHiVision 0x0080 /* for SiS bridge */
+#define SetCRT2ToCHYPbPr SetCRT2ToHiVision /* for Chrontel */
#define SetNTSCTV 0x0000 /* CR 31 */
-#define SetPALTV 0x0100 /* Deprecated here, now in TVMode */
+#define SetPALTV 0x0100 /* Deprecated here, now in TVMode */
#define SetInSlaveMode 0x0200
#define SetNotSimuMode 0x0400
#define SetNotSimuTVMode SetNotSimuMode
@@ -128,7 +128,7 @@
/* v-- Needs change in sis_vga.c if changed (GPIO) --v */
#define SetCRT2ToTV (SetCRT2ToYPbPr525750|SetCRT2ToHiVision|SetCRT2ToSCART|SetCRT2ToSVIDEO|SetCRT2ToAVIDEO)
#define SetCRT2ToTVNoYPbPrHiVision (SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
-#define SetCRT2ToTVNoHiVision (SetCRT2ToYPbPr525750 | SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
+#define SetCRT2ToTVNoHiVision (SetCRT2ToYPbPr525750 | SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
/* SiS_ModeType */
#define ModeText 0x00
@@ -159,7 +159,7 @@
/* Infoflag */
#define SupportTV 0x0008
#define SupportTV1024 0x0800
-#define SupportCHTV 0x0800
+#define SupportCHTV 0x0800
#define Support64048060Hz 0x0800 /* Special for 640x480 LCD */
#define SupportHiVision 0x0010
#define SupportYPbPr750p 0x1000
@@ -297,7 +297,7 @@
#define LCDSyncShift 6
/* CR38 (315 series) */
-#define EnableDualEdge 0x01
+#define EnableDualEdge 0x01
#define SetToLCDA 0x02 /* LCD channel A (301C/302B/30x(E)LV and 650+LVDS only) */
#define EnableCHScart 0x04 /* Scart on Ch7019 (unofficial definition - TW) */
#define EnableCHYPbPr 0x08 /* YPbPr on Ch7019 (480i HDTV); only on 650/Ch7019 systems */
@@ -605,7 +605,7 @@
#define _PanelType0E 0x70
#define _PanelType0F 0x78
-#define PRIMARY_VGA 0 /* 1: SiS is primary vga 0:SiS is secondary vga */
+#define PRIMARY_VGA 0 /* 1: SiS is primary vga 0:SiS is secondary vga */
#define BIOSIDCodeAddr 0x235 /* Offsets to ptrs in BIOS image */
#define OEMUtilIDCodeAddr 0x237
@@ -650,7 +650,7 @@
/*
=============================================================
- for 315 series (old data layout)
+ for 315 series (old data layout)
=============================================================
*/
#define SoftDRAMType 0x80
diff --git a/src/drivers/xgi/common/vstruct.h b/src/drivers/xgi/common/vstruct.h
index d14a182..3e530a2 100644
--- a/src/drivers/xgi/common/vstruct.h
+++ b/src/drivers/xgi/common/vstruct.h
@@ -42,7 +42,7 @@
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
- * Author: Thomas Winischhofer <thomas at winischhofer.net>
+ * Author: Thomas Winischhofer <thomas at winischhofer.net>
*
*/
@@ -230,7 +230,7 @@
unsigned char ChipType;
unsigned char ChipRevision;
void *ivideo;
- unsigned char *VirtualRomBase;
+ unsigned char *VirtualRomBase;
bool UseROM;
unsigned char SISIOMEMTYPE *VideoMemoryAddress;
unsigned int VideoMemorySize;
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ia9ca055679c0332613afb2bb2ed86df165de3baf
Gerrit-Change-Number: 26649
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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