[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/cpu: Perform AP init if publish_mp_service_ppi=1

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/26645


Change subject: soc/intel/common/block/cpu: Perform AP init if publish_mp_service_ppi=1
......................................................................

soc/intel/common/block/cpu: Perform AP init if publish_mp_service_ppi=1

This patch ensures that coreboot can still perform AP initialziation
if publish_mp_service_ppi is enabled through mainboard devicetree.cb

Change-Id: I699c5457898c1dea0b6f78ec74dd02fb400db14f
Signed-off-by: Subrata Banik <subrata.banik at intel.com>
---
M src/soc/intel/apollolake/chip.h
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/skylake/chip.h
4 files changed, 22 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/26645/1

diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index f00924f..5103b54 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -158,6 +158,13 @@
 	 * 0: Initialize(Default), 1: Skip
 	 */
 	uint8_t FspSkipMpInit;
+
+	/*
+	 * Create MP service PPI
+	 * 0 = Don't create PPI structure
+	 * 1 = Create PPI structure
+	 */
+	uint8_t publish_mp_service_ppi;
 };
 
 typedef struct soc_intel_apollolake_config config_t;
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 8fdb964..595e873 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -285,6 +285,13 @@
 	/* Intel VT configuration */
 	uint8_t VtdDisable;
 	uint8_t VmxEnable;
+
+	/*
+	 * Create MP service PPI
+	 * 0 = Don't create PPI structure
+	 * 1 = Create PPI structure
+	 */
+	uint8_t publish_mp_service_ppi;
 };
 
 typedef struct soc_intel_cannonlake_config config_t;
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 7a3ba87..6a96065 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -126,7 +126,7 @@
 	assert(dev != NULL);
 	config_t *config = dev->chip_info;
 
-	if (config->FspSkipMpInit)
+	if (config->FspSkipMpInit || config->publish_mp_service_ppi)
 		return true;
 
 	return false;
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index 2523554..f8c876e 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -563,6 +563,13 @@
 
 	/* Enable/Disable Sata power optimization */
 	u8 SataPwrOptEnable;
+
+	/*
+	 * Create MP service PPI
+	 * 0 = Don't create PPI structure
+	 * 1 = Create PPI structure
+	 */
+	u8 publish_mp_service_ppi;
 };
 
 typedef struct soc_intel_skylake_config config_t;

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I699c5457898c1dea0b6f78ec74dd02fb400db14f
Gerrit-Change-Number: 26645
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik <subrata.banik at intel.com>
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