[coreboot-gerrit] Change in coreboot[master]: MB/tyan: Get rid of whitespace before tab

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26639


Change subject: MB/tyan: Get rid of whitespace before tab
......................................................................

MB/tyan: Get rid of whitespace before tab

Change-Id: I19225ee52cd4ddf96cfecc3488d2114f6ae62b1a
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/mainboard/tyan/s2912/resourcemap.c
M src/mainboard/tyan/s2912/romstage.c
M src/mainboard/tyan/s2912_fam10/resourcemap.c
3 files changed, 3 insertions(+), 3 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/26639/1

diff --git a/src/mainboard/tyan/s2912/resourcemap.c b/src/mainboard/tyan/s2912/resourcemap.c
index 9ac7ae4..2f8ec26 100644
--- a/src/mainboard/tyan/s2912/resourcemap.c
+++ b/src/mainboard/tyan/s2912/resourcemap.c
@@ -266,7 +266,7 @@
 		 *	   This field defines the highest bus number in configuration region i
 		 */
 //		PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x3f000003, /* link 0 of CPU 0 --> Nvidia MCP55 Pro */
-//		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x7f400203, /* link 2 of CPU 0 --> nvidia io55 	*/
+//		PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x7f400203, /* link 2 of CPU 0 --> nvidia io55	*/
 		PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
 		PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
 
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 1650d3d..69d3d31 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -180,7 +180,7 @@
 	// fidvid change will issue one LDTSTOP and the HT change will be effective too
 	if (needs_reset) {
 		printk(BIOS_INFO, "ht reset -\n");
-	      	soft_reset();
+		soft_reset();
 	}
 
 	allow_all_aps_stop(bsp_apicid);
diff --git a/src/mainboard/tyan/s2912_fam10/resourcemap.c b/src/mainboard/tyan/s2912_fam10/resourcemap.c
index 14e3c53..bc03d21 100644
--- a/src/mainboard/tyan/s2912_fam10/resourcemap.c
+++ b/src/mainboard/tyan/s2912_fam10/resourcemap.c
@@ -266,7 +266,7 @@
 		 *	   This field defines the highest bus number in configuration region i
 		 */
 //		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE0), 0x0000FC88, 0x3f000003, /* link 0 of CPU 0 --> Nvidia MCP55 Pro */
-//		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x7f400203, /* link 2 of CPU 0 --> nvidia io55 	*/
+//		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE4), 0x0000FC88, 0x7f400203, /* link 2 of CPU 0 --> nvidia io55	*/
 		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xE8), 0x0000FC88, 0x00000000,
 		PCI_ADDR(CONFIG_CBB, CONFIG_CDB, 1, 0xEC), 0x0000FC88, 0x00000000,
 

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I19225ee52cd4ddf96cfecc3488d2114f6ae62b1a
Gerrit-Change-Number: 26639
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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