[coreboot-gerrit] Change in coreboot[master]: mb/siemens: Get rid of whitespace before tab
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Mon May 28 13:50:24 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26636
Change subject: mb/siemens: Get rid of whitespace before tab
......................................................................
mb/siemens: Get rid of whitespace before tab
Change-Id: Ic334f65e5c27d4f773f81fc1c9e3df7d63d47a11
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/mainboard/siemens/mc_tcu3/devicetree.cb
M src/mainboard/siemens/mc_tcu3/gpio.c
M src/mainboard/siemens/mc_tcu3/irqroute.h
M src/mainboard/siemens/sitemp_g1p1/acpi/event.asl
M src/mainboard/siemens/sitemp_g1p1/acpi/statdef.asl
M src/mainboard/siemens/sitemp_g1p1/devicetree.cb
M src/mainboard/siemens/sitemp_g1p1/dsdt.asl
M src/mainboard/siemens/sitemp_g1p1/mainboard.c
8 files changed, 45 insertions(+), 45 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/26636/1
diff --git a/src/mainboard/siemens/mc_tcu3/devicetree.cb b/src/mainboard/siemens/mc_tcu3/devicetree.cb
index 2a8183d..433eebe 100644
--- a/src/mainboard/siemens/mc_tcu3/devicetree.cb
+++ b/src/mainboard/siemens/mc_tcu3/devicetree.cb
@@ -59,7 +59,7 @@
device pci 18.7 on end # 8086 0F47 - I2C Port 7
device pci 1a.0 on end # 8086 0F18 - Trusted Execution Engine
device pci 1b.0 on end # 8086 0F04 - HD Audio
- device pci 1c.0 on # 8086 0F48 - PCIe Root Port 1 (x4 slot)
+ device pci 1c.0 on # 8086 0F48 - PCIe Root Port 1 (x4 slot)
device pci 0.0 on end # 8086 1538 - Intel i210 MACPHY
end
device pci 1c.1 on end # 8086 0F4A - PCIe Root Port 2 (half mini pcie slot)
diff --git a/src/mainboard/siemens/mc_tcu3/gpio.c b/src/mainboard/siemens/mc_tcu3/gpio.c
index c803998..23c6f96 100644
--- a/src/mainboard/siemens/mc_tcu3/gpio.c
+++ b/src/mainboard/siemens/mc_tcu3/gpio.c
@@ -160,14 +160,14 @@
/* SSUS GPIOs (GPIO_S5) */
static const struct soc_gpio_map gpssus_gpio_map[] = {
GPIO_INPUT_PD_10K, /* GPIO_S5[00] RESERVED */
- GPIO_INPUT_PD_10K, /* GPIO_S5[01] RESERVED RESERVED RESERVED PMC_WAKE_PCIE[1]# */
+ GPIO_INPUT_PD_10K, /* GPIO_S5[01] RESERVED RESERVED RESERVED PMC_WAKE_PCIE[1]# */
GPIO_INPUT_PD_10K, /* GPIO_S5[02] RESERVED RESERVED RESERVED PMC_WAKE_PCIE[2]# */
GPIO_INPUT_PD_10K, /* GPIO_S5[03] RESERVED RESERVED RESERVED PMC_WAKE_PCIE[3]# */
GPIO_INPUT_PD_10K, /* GPIO_S5[04] RESERVED RESERVED RESERVED RESERVED */
GPIO_INPUT_PD_10K, /* GPIO_S5[05] PMC_SUSCLK[1] RESERVED RESERVED RESERVED */
GPIO_INPUT_PD_10K, /* GPIO_S5[06] PMC_SUSCLK[2] RESERVED RESERVED RESERVED */
GPIO_INPUT_PD_10K, /* GPIO_S5[07] PMC_SUSCLK[3] RESERVED RESERVED RESERVED */
- GPIO_INPUT_PU_10K, /* GPIO_S5[08] RESERVED RESERVED RESERVED RESERVED */
+ GPIO_INPUT_PU_10K, /* GPIO_S5[08] RESERVED RESERVED RESERVED RESERVED */
GPIO_INPUT_PU_10K, /* GPIO_S5[09] RESERVED RESERVED ESERVED RESERVED */
GPIO_OUT_HIGH, /* GPIO_S5[10] RESERVED RESERVED RESERVED */
GPIO_DEFAULT, /* PMC_SUSPWRDNACK GPIO_S5[11] - - */
diff --git a/src/mainboard/siemens/mc_tcu3/irqroute.h b/src/mainboard/siemens/mc_tcu3/irqroute.h
index a24be3e..41b990b 100644
--- a/src/mainboard/siemens/mc_tcu3/irqroute.h
+++ b/src/mainboard/siemens/mc_tcu3/irqroute.h
@@ -20,14 +20,14 @@
#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
/*
- *IR02h GFX INT(A) - PIRQ A
+ *IR02h GFX INT(A) - PIRQ A
*IR10h EMMC INT(ABCD) - PIRQ DEFG
- *IR11h SDIO INT(A) - PIRQ B
- *IR12h SD INT(A) - PIRQ C
- *IR13h SATA INT(A) - PIRQ D
- *IR14h XHCI INT(A) - PIRQ E
- *IR15h LP Audio INT(A) - PIRQ F
- *IR17h MMC INT(A) - PIRQ F
+ *IR11h SDIO INT(A) - PIRQ B
+ *IR12h SD INT(A) - PIRQ C
+ *IR13h SATA INT(A) - PIRQ D
+ *IR14h XHCI INT(A) - PIRQ E
+ *IR15h LP Audio INT(A) - PIRQ F
+ *IR17h MMC INT(A) - PIRQ F
*IR18h SIO INT(ABCD) - PIRQ BADC
*IR1Ah TXE INT(A) - PIRQ F
*IR1Bh HD Audio INT(A) - PIRQ G
diff --git a/src/mainboard/siemens/sitemp_g1p1/acpi/event.asl b/src/mainboard/siemens/sitemp_g1p1/acpi/event.asl
index fafb0ac..d0cad21 100644
--- a/src/mainboard/siemens/sitemp_g1p1/acpi/event.asl
+++ b/src/mainboard/siemens/sitemp_g1p1/acpi/event.asl
@@ -53,7 +53,7 @@
/* On older chips, clear PciExpWakeDisEn */
/*if (LLessEqual(\_SB.SBRI, 0x13)) {
- * Store(0,\_SB.PWDE)
+ * Store(0,\_SB.PWDE)
*}
*/
@@ -69,13 +69,13 @@
* used, so it could be removed.
*
*
-* \_GTS OEM Going To Sleep method
+* \_GTS OEM Going To Sleep method
*
-* Entry:
-* Arg0=The value of the sleeping state S1=1, S2=2
+* Entry:
+* Arg0=The value of the sleeping state S1=1, S2=2
*
-* Exit:
-* -none-
+* Exit:
+* -none-
*
* Method(\_GTS, 1) {
* DBGO("\\_GTS\n")
@@ -200,7 +200,7 @@
/* PCIe HotPlug event */
/* Method(_L0F) {
- * DBGO("\\_GPE\\_L0F\n")
+ * DBGO("\\_GPE\\_L0F\n")
* }
*/
@@ -223,19 +223,19 @@
/* GPM0 SCI event - Moved to USB.asl */
/* Method(_L13) {
- * DBGO("\\_GPE\\_L13\n")
+ * DBGO("\\_GPE\\_L13\n")
* }
*/
/* GPM1 SCI event - Moved to USB.asl */
/* Method(_L14) {
- * DBGO("\\_GPE\\_L14\n")
+ * DBGO("\\_GPE\\_L14\n")
* }
*/
/* GPM2 SCI event - Moved to USB.asl */
/* Method(_L15) {
- * DBGO("\\_GPE\\_L15\n")
+ * DBGO("\\_GPE\\_L15\n")
* }
*/
@@ -247,7 +247,7 @@
/* GPM8 SCI event - Moved to USB.asl */
/* Method(_L17) {
- * DBGO("\\_GPE\\_L17\n")
+ * DBGO("\\_GPE\\_L17\n")
* }
*/
@@ -264,7 +264,7 @@
/* GPM4 SCI event - Moved to USB.asl */
/* Method(_L19) {
- * DBGO("\\_GPE\\_L19\n")
+ * DBGO("\\_GPE\\_L19\n")
* }
*/
@@ -295,10 +295,10 @@
/* GPIO2 or GPIO66 SCI event */
/* Method(_L1E) {
- * DBGO("\\_GPE\\_L1E\n")
+ * DBGO("\\_GPE\\_L1E\n")
* }
*/
/* SATA SCI event */
/* SATA Hot Plug Support -> acpi/sata.asl */
-} /* End Scope GPE */
+} /* End Scope GPE */
diff --git a/src/mainboard/siemens/sitemp_g1p1/acpi/statdef.asl b/src/mainboard/siemens/sitemp_g1p1/acpi/statdef.asl
index 3de9620..f8c4b32 100644
--- a/src/mainboard/siemens/sitemp_g1p1/acpi/statdef.asl
+++ b/src/mainboard/siemens/sitemp_g1p1/acpi/statdef.asl
@@ -52,7 +52,7 @@
/* Battery Device Notification Values */
#define NOTIFY_BAT_STATUSCHG 0x80
-#define NOTIFY_BAT_INFOCHG 0x81
+#define NOTIFY_BAT_INFOCHG 0x81
#define NOTIFY_BAT_MAINTDATA 0x82
/* Power Source Object Notification Values */
@@ -62,7 +62,7 @@
#define NOTIFY_TZ_STATUSCHG 0x80
#define NOTIFY_TZ_TRIPPTCHG 0x81
#define NOTIFY_TZ_DEVLISTCHG 0x82
-#define NOTIFY_TZ_RELTBLCHG 0x83
+#define NOTIFY_TZ_RELTBLCHG 0x83
/* Power Button Notification Values */
#define NOTIFY_POWER_BUTTON 0x80
@@ -74,14 +74,14 @@
#define NOTIFY_LID_STATUSCHG 0x80
/* Processor Device Notification Values */
-#define NOTIFY_CPU_PPCCHG 0x80
-#define NOTIFY_CPU_CSTATECHG 0x81
+#define NOTIFY_CPU_PPCCHG 0x80
+#define NOTIFY_CPU_CSTATECHG 0x81
#define NOTIFY_CPU_THROTLCHG 0x82
/* User Presence Device Notification Values */
#define NOTIFY_USR_PRESNCECHG 0x80
/* Battery Device Notification Values */
-#define NOTIFY_ALS_ILLUMCHG 0x80
-#define NOTIFY_ALS_COLORTMPCHG 0x81
+#define NOTIFY_ALS_ILLUMCHG 0x80
+#define NOTIFY_ALS_COLORTMPCHG 0x81
#define NOTIFY_ALS_RESPCHG 0x82
diff --git a/src/mainboard/siemens/sitemp_g1p1/devicetree.cb b/src/mainboard/siemens/sitemp_g1p1/devicetree.cb
index e47703f..30125e4 100644
--- a/src/mainboard/siemens/sitemp_g1p1/devicetree.cb
+++ b/src/mainboard/siemens/sitemp_g1p1/devicetree.cb
@@ -59,7 +59,7 @@
device pci 13.3 on end # USB 0x438a
device pci 13.4 on end # USB 0x438b
device pci 13.5 on end # USB 2 0x4386
- device pci 14.0 on # SM 0x4385
+ device pci 14.0 on # SM 0x4385
chip drivers/generic/generic #dimm 0-0-0
device i2c 50 on end
end
diff --git a/src/mainboard/siemens/sitemp_g1p1/dsdt.asl b/src/mainboard/siemens/sitemp_g1p1/dsdt.asl
index 121aaf9..902647e 100644
--- a/src/mainboard/siemens/sitemp_g1p1/dsdt.asl
+++ b/src/mainboard/siemens/sitemp_g1p1/dsdt.asl
@@ -181,9 +181,9 @@
PWMK, 1,
PWNS, 1,
- /* Offset(0x61), */ /* Options_1 */
- /* ,7, */
- /* R617,1, */
+ /* Offset(0x61), */ /* Options_1 */
+ /* ,7, */
+ /* R617,1, */
Offset(0x65), /* UsbPMControl */
, 4,
@@ -1162,7 +1162,7 @@
0xF300 /* length */
)
- Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */
+ Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */
Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1) /* Assume C0000-E0000 empty */
Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS) /* BIOS ROM area */
diff --git a/src/mainboard/siemens/sitemp_g1p1/mainboard.c b/src/mainboard/siemens/sitemp_g1p1/mainboard.c
index d4cb582..b7976e7 100644
--- a/src/mainboard/siemens/sitemp_g1p1/mainboard.c
+++ b/src/mainboard/siemens/sitemp_g1p1/mainboard.c
@@ -38,16 +38,16 @@
// ****LCD panel ID support: *****
// Callback Sub-Function 00h - Get LCD Panel ID
-#define PANEL_TABLE_ID_NO 0 // no LCD
-#define PANEL_TABLE_ID1 1 // 1024x768_65MHz_Dual
-#define PANEL_TABLE_ID2 2 // 920x1200_162MHz
-#define PANEL_TABLE_ID3 3 // 600x1200_162MHz
-#define PANEL_TABLE_ID4 4 // 1024x768_65MHz
-#define PANEL_TABLE_ID5 5 // 1400x1050_108MHz
-#define PANEL_TABLE_ID6 6 // 1680x1050_119MHz
-#define PANEL_TABLE_ID7 7 // 2048x1536_164MHz
-#define PANEL_TABLE_ID8 8 // 1280x1024_108MHz
-#define PANEL_TABLE_ID9 9 // 1366x768_86MHz_chimei_V32B1L01
+#define PANEL_TABLE_ID_NO 0 // no LCD
+#define PANEL_TABLE_ID1 1 // 1024x768_65MHz_Dual
+#define PANEL_TABLE_ID2 2 // 920x1200_162MHz
+#define PANEL_TABLE_ID3 3 // 600x1200_162MHz
+#define PANEL_TABLE_ID4 4 // 1024x768_65MHz
+#define PANEL_TABLE_ID5 5 // 1400x1050_108MHz
+#define PANEL_TABLE_ID6 6 // 1680x1050_119MHz
+#define PANEL_TABLE_ID7 7 // 2048x1536_164MHz
+#define PANEL_TABLE_ID8 8 // 1280x1024_108MHz
+#define PANEL_TABLE_ID9 9 // 1366x768_86MHz_chimei_V32B1L01
// Callback Sub-Function 05h - Select Boot-up TV Standard
#define TV_MODE_00 0x00 /* NTSC */
--
To view, visit https://review.coreboot.org/26636
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic334f65e5c27d4f773f81fc1c9e3df7d63d47a11
Gerrit-Change-Number: 26636
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180528/7d558d2b/attachment-0001.html>
More information about the coreboot-gerrit
mailing list