[coreboot-gerrit] Change in coreboot[master]: mb/roda: Get rid of whitespace before tab

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26634


Change subject: mb/roda: Get rid of whitespace before tab
......................................................................

mb/roda: Get rid of whitespace before tab

Change-Id: Id9a6ba85e63c5758e83ee319f5fcfedbcd787553
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/mainboard/roda/rk886ex/acpi/thermal.asl
M src/mainboard/roda/rk886ex/devicetree.cb
2 files changed, 12 insertions(+), 12 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/26634/1

diff --git a/src/mainboard/roda/rk886ex/acpi/thermal.asl b/src/mainboard/roda/rk886ex/acpi/thermal.asl
index 84845be..6a4d701 100644
--- a/src/mainboard/roda/rk886ex/acpi/thermal.asl
+++ b/src/mainboard/roda/rk886ex/acpi/thermal.asl
@@ -37,7 +37,7 @@
 
 		// Method (_AC1, 0, Serialized)
 		// {
-		// 	Return (0xf5c)
+		//	Return (0xf5c)
 		// }
 
 		// Critical shutdown temperature
diff --git a/src/mainboard/roda/rk886ex/devicetree.cb b/src/mainboard/roda/rk886ex/devicetree.cb
index 28f8f43..129d1e9 100644
--- a/src/mainboard/roda/rk886ex/devicetree.cb
+++ b/src/mainboard/roda/rk886ex/devicetree.cb
@@ -63,21 +63,21 @@
                         register "ide_enable_secondary" = "0x0"
                         register "sata_ahci" = "0x0"
 
-                	device pci 1b.0 on end # High Definition Audio
-                	device pci 1c.0 on end # PCIe
-                	device pci 1c.1 on end # PCIe
-                	device pci 1c.2 on end # PCIe
+	device pci 1b.0 on end # High Definition Audio
+	device pci 1c.0 on end # PCIe
+	device pci 1c.1 on end # PCIe
+	device pci 1c.2 on end # PCIe
 			#device pci 1c.3 off end # PCIe port 4
 			#device pci 1c.4 off end # PCIe port 5
 			#device pci 1c.5 off end # PCIe port 6
-                	device pci 1d.0 on end # USB UHCI
-                	device pci 1d.1 on end # USB UHCI
-                	device pci 1d.2 on end # USB UHCI
-                	device pci 1d.3 on end # USB UHCI
-                	device pci 1d.7 on end # USB2 EHCI
-                	device pci 1e.0 on
+	device pci 1d.0 on end # USB UHCI
+	device pci 1d.1 on end # USB UHCI
+	device pci 1d.2 on end # USB UHCI
+	device pci 1d.3 on end # USB UHCI
+	device pci 1d.7 on end # USB2 EHCI
+	device pci 1e.0 on
 				chip southbridge/ti/pci7420
-                        		register "smartcard_enabled" = "0x0"
+       		register "smartcard_enabled" = "0x0"
 					device pci 3.0 on end
 					device pci 3.1 on end
 					device pci 3.2 on end

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id9a6ba85e63c5758e83ee319f5fcfedbcd787553
Gerrit-Change-Number: 26634
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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