[coreboot-gerrit] Change in coreboot[master]: sb/amd/amd8111: Get rid of device_t
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Sat May 19 14:46:35 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26409
Change subject: sb/amd/amd8111: Get rid of device_t
......................................................................
sb/amd/amd8111: Get rid of device_t
Use of device_t has been abandoned in ramstage.
Change-Id: I143617bb1a4ab1812ec50155861ae2f75060851b
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/southbridge/amd/amd8111/ac97.c
M src/southbridge/amd/amd8111/acpi.c
M src/southbridge/amd/amd8111/amd8111.c
M src/southbridge/amd/amd8111/amd8111.h
M src/southbridge/amd/amd8111/ide.c
M src/southbridge/amd/amd8111/lpc.c
M src/southbridge/amd/amd8111/nic.c
M src/southbridge/amd/amd8111/smbus.c
M src/southbridge/amd/amd8111/usb.c
M src/southbridge/amd/amd8111/usb2.c
10 files changed, 23 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/26409/1
diff --git a/src/southbridge/amd/amd8111/ac97.c b/src/southbridge/amd/amd8111/ac97.c
index f49c9bf..fa14f9c 100644
--- a/src/southbridge/amd/amd8111/ac97.c
+++ b/src/southbridge/amd/amd8111/ac97.c
@@ -8,7 +8,7 @@
#include <device/pci_ops.h>
#include "amd8111.h"
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x2c,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/amd/amd8111/acpi.c b/src/southbridge/amd/amd8111/acpi.c
index fd3fe49..11c3963 100644
--- a/src/southbridge/amd/amd8111/acpi.c
+++ b/src/southbridge/amd/amd8111/acpi.c
@@ -21,7 +21,7 @@
#endif
-static int lsmbus_recv_byte(device_t dev)
+static int lsmbus_recv_byte(struct device *dev)
{
unsigned device;
struct resource *res;
@@ -32,7 +32,7 @@
return do_smbus_recv_byte(res->base, device);
}
-static int lsmbus_send_byte(device_t dev, uint8_t val)
+static int lsmbus_send_byte(struct device *dev, uint8_t val)
{
unsigned device;
struct resource *res;
@@ -44,7 +44,7 @@
}
-static int lsmbus_read_byte(device_t dev, uint8_t address)
+static int lsmbus_read_byte(struct device *dev, uint8_t address)
{
unsigned device;
struct resource *res;
@@ -55,7 +55,7 @@
return do_smbus_read_byte(res->base, device, address);
}
-static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val)
+static int lsmbus_write_byte(struct device *dev, uint8_t address, uint8_t val)
{
unsigned device;
struct resource *res;
@@ -66,7 +66,7 @@
return do_smbus_write_byte(res->base, device, address, val);
}
-static int lsmbus_block_read(device_t dev, uint8_t cmd, u8 bytes, u8 *buffer)
+static int lsmbus_block_read(struct device *dev, uint8_t cmd, u8 bytes, u8 *buffer)
{
unsigned device;
struct resource *res;
@@ -77,7 +77,7 @@
return do_smbus_block_read(res->base, device, cmd, bytes, buffer);
}
-static int lsmbus_block_write(device_t dev, uint8_t cmd, u8 bytes, const u8 *buffer)
+static int lsmbus_block_write(struct device *dev, uint8_t cmd, u8 bytes, const u8 *buffer)
{
unsigned device;
struct resource *res;
@@ -168,7 +168,7 @@
}
-static void acpi_read_resources(device_t dev)
+static void acpi_read_resources(struct device *dev)
{
struct resource *resource;
@@ -186,7 +186,7 @@
resource->index = 0x58;
}
-static void acpi_enable_resources(device_t dev)
+static void acpi_enable_resources(struct device *dev)
{
uint8_t byte;
/* Enable the generic pci resources */
@@ -202,7 +202,7 @@
}
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x7c,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c
index 2707ca6..c75ce0d 100644
--- a/src/southbridge/amd/amd8111/amd8111.c
+++ b/src/southbridge/amd/amd8111/amd8111.c
@@ -4,10 +4,10 @@
#include <device/pci_ids.h>
#include "amd8111.h"
-void amd8111_enable(device_t dev)
+void amd8111_enable(struct device *dev)
{
- device_t lpc_dev;
- device_t bus_dev;
+ struct device *lpc_dev;
+ struct device *bus_dev;
unsigned index;
unsigned reg_old, reg;
diff --git a/src/southbridge/amd/amd8111/amd8111.h b/src/southbridge/amd/amd8111/amd8111.h
index 10df590..991f5a3 100644
--- a/src/southbridge/amd/amd8111/amd8111.h
+++ b/src/southbridge/amd/amd8111/amd8111.h
@@ -4,7 +4,7 @@
#include "chip.h"
#ifndef __SIMPLE_DEVICE__
-void amd8111_enable(device_t dev);
+void amd8111_enable(struct device *dev);
#endif
#ifdef __PRE_RAM__
diff --git a/src/southbridge/amd/amd8111/ide.c b/src/southbridge/amd/amd8111/ide.c
index fec424d..8ebe228 100644
--- a/src/southbridge/amd/amd8111/ide.c
+++ b/src/southbridge/amd/amd8111/ide.c
@@ -40,7 +40,7 @@
pci_write_config16(dev, 0x42, word);
}
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x70,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c
index 00c56f6..eba3850 100644
--- a/src/southbridge/amd/amd8111/lpc.c
+++ b/src/southbridge/amd/amd8111/lpc.c
@@ -86,7 +86,7 @@
enable_hpet(dev);
}
-static void amd8111_lpc_read_resources(device_t dev)
+static void amd8111_lpc_read_resources(struct device *dev)
{
struct resource *res;
@@ -112,7 +112,7 @@
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x70,
((device & 0xffff) << 16) | (vendor & 0xffff));
@@ -128,7 +128,7 @@
return current;
}
-static void southbridge_acpi_fill_ssdt_generator(device_t device) {
+static void southbridge_acpi_fill_ssdt_generator(struct device *device) {
#if IS_ENABLED(CONFIG_SET_FIDVID)
amd_generate_powernow(pm_base + 0x10, 6, 1);
acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS");
diff --git a/src/southbridge/amd/amd8111/nic.c b/src/southbridge/amd/amd8111/nic.c
index 05ca871..a3767e2 100644
--- a/src/southbridge/amd/amd8111/nic.c
+++ b/src/southbridge/amd/amd8111/nic.c
@@ -63,7 +63,7 @@
printk(BIOS_DEBUG, "Done\n");
}
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0xc8,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/amd/amd8111/smbus.c b/src/southbridge/amd/amd8111/smbus.c
index def1377..df5d73a 100644
--- a/src/southbridge/amd/amd8111/smbus.c
+++ b/src/southbridge/amd/amd8111/smbus.c
@@ -11,7 +11,7 @@
#include "amd8111.h"
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x44,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/amd/amd8111/usb.c b/src/southbridge/amd/amd8111/usb.c
index feb7793..7160fb1 100644
--- a/src/southbridge/amd/amd8111/usb.c
+++ b/src/southbridge/amd/amd8111/usb.c
@@ -10,7 +10,7 @@
#include "amd8111.h"
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x70,
((device & 0xffff) << 16) | (vendor & 0xffff));
diff --git a/src/southbridge/amd/amd8111/usb2.c b/src/southbridge/amd/amd8111/usb2.c
index 7a354d6..8526dc3 100644
--- a/src/southbridge/amd/amd8111/usb2.c
+++ b/src/southbridge/amd/amd8111/usb2.c
@@ -9,7 +9,7 @@
#if 0
-static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void lpci_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x70,
((device & 0xffff) << 16) | (vendor & 0xffff));
@@ -21,7 +21,7 @@
#endif
-static void amd8111_usb2_enable(device_t dev)
+static void amd8111_usb2_enable(struct device *dev)
{
// Due to buggy USB2 we force it to disable.
dev->enabled = 0;
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I143617bb1a4ab1812ec50155861ae2f75060851b
Gerrit-Change-Number: 26409
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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