[coreboot-gerrit] Change in coreboot[master]: drivers/pc80/tpm: get ioport from pnp records

[Kevin Cody-Little (Code Review)]

Kevin Cody-Little has uploaded this change for review. ( https://review.coreboot.org/26203


Change subject: drivers/pc80/tpm: get ioport from pnp records
......................................................................

drivers/pc80/tpm: get ioport from pnp records

Had 0x2e hardcoded, which is often the SuperIO chip. Instead,
pull the port from the PNP tree generated from devicetree.cb,
where either 0x4e or 0x2e will be specified.

Change-Id: I4a92693f8acd3a1618cefcdf6b25eb22a727e20f
Signed-off-by: Kevin Cody-Little <kcodyjr at gmail.com>
---
M src/drivers/pc80/tpm/tis.c
1 file changed, 3 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/26203/1

diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c
index 714b7e5..3549173 100644
--- a/src/drivers/pc80/tpm/tis.c
+++ b/src/drivers/pc80/tpm/tis.c
@@ -904,11 +904,13 @@
 	else
 		acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_OFF);
 
+	u16 port = dev->path.pnp.port;
+
 	/* Resources */
 	acpigen_write_name("_CRS");
 	acpigen_write_resourcetemplate_header();
 	acpigen_write_mem32fixed(1, CONFIG_TPM_TIS_BASE_ADDRESS, 0x5000);
-	acpigen_write_io16(0x2e, 0x2e, 1, 2, 1);
+	acpigen_write_io16(port, port, 1, 2, 1);
 
 	if (CONFIG_TPM_PIRQ) {
 		/*

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4a92693f8acd3a1618cefcdf6b25eb22a727e20f
Gerrit-Change-Number: 26203
Gerrit-PatchSet: 1
Gerrit-Owner: Kevin Cody-Little <kcodyjr at gmail.com>
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