<p>Kevin Cody-Little has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26203">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">drivers/pc80/tpm: get ioport from pnp records<br><br>Had 0x2e hardcoded, which is often the SuperIO chip. Instead,<br>pull the port from the PNP tree generated from devicetree.cb,<br>where either 0x4e or 0x2e will be specified.<br><br>Change-Id: I4a92693f8acd3a1618cefcdf6b25eb22a727e20f<br>Signed-off-by: Kevin Cody-Little <kcodyjr@gmail.com><br>---<br>M src/drivers/pc80/tpm/tis.c<br>1 file changed, 3 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/26203/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c</span><br><span>index 714b7e5..3549173 100644</span><br><span>--- a/src/drivers/pc80/tpm/tis.c</span><br><span>+++ b/src/drivers/pc80/tpm/tis.c</span><br><span>@@ -904,11 +904,13 @@</span><br><span>    else</span><br><span>                 acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_OFF);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+    u16 port = dev->path.pnp.port;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>  /* Resources */</span><br><span>      acpigen_write_name("_CRS");</span><br><span>        acpigen_write_resourcetemplate_header();</span><br><span>     acpigen_write_mem32fixed(1, CONFIG_TPM_TIS_BASE_ADDRESS, 0x5000);</span><br><span style="color: hsl(0, 100%, 40%);">-       acpigen_write_io16(0x2e, 0x2e, 1, 2, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+      acpigen_write_io16(port, port, 1, 2, 1);</span><br><span> </span><br><span>         if (CONFIG_TPM_PIRQ) {</span><br><span>               /*</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26203">change 26203</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26203"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I4a92693f8acd3a1618cefcdf6b25eb22a727e20f </div>
<div style="display:none"> Gerrit-Change-Number: 26203 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Kevin Cody-Little <kcodyjr@gmail.com> </div>