[coreboot-gerrit] Change in coreboot[master]: nb/intel/i945/gma.c: Remove not necessary braces {}

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/26200


Change subject: nb/intel/i945/gma.c: Remove not necessary braces {}
......................................................................

nb/intel/i945/gma.c: Remove not necessary braces {}

Braces {} are not necessary for single statement blocks.
Not necessary 'Else' staytment removed.

Change-Id: I489d4b0b1e41cf2437fef05050ed7daa617869ff
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/northbridge/intel/i945/gma.c
1 file changed, 17 insertions(+), 21 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/26200/1

diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 6c3d6ae..a6681ea 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -384,13 +384,13 @@
 
 		set_vbe_mode_info_valid(&edid, pgfx);
 	} else {
-			vga_misc_write(0x67);
+		vga_misc_write(0x67);
 
-			write32(mmiobase + DSPCNTR(0), DISPPLANE_SEL_PIPE_B);
-			write32(mmiobase + VGACNTRL, 0x02c4008e
-				| VGA_PIPE_B_SELECT);
+		write32(mmiobase + DSPCNTR(0), DISPPLANE_SEL_PIPE_B);
+		write32(mmiobase + VGACNTRL, 0x02c4008e
+			| VGA_PIPE_B_SELECT);
 
-			vga_textmode_init();
+		vga_textmode_init();
 	}
 	return 0;
 }
@@ -588,16 +588,15 @@
 {
 	u16 gcfgc = pci_read_config16(dev, GCFGC);
 
-	if (gcfgc & GC_LOW_FREQUENCY_ENABLE) {
+	if (gcfgc & GC_LOW_FREQUENCY_ENABLE)
 		return 133333333;
-	} else {
-		switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
-		case GC_DISPLAY_CLOCK_333_320_MHZ:
-			return 320000000;
-		default:
-		case GC_DISPLAY_CLOCK_190_200_MHZ:
-			return 200000000;
-		}
+
+	switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
+	case GC_DISPLAY_CLOCK_333_320_MHZ:
+		return 320000000;
+	default:
+	case GC_DISPLAY_CLOCK_190_200_MHZ:
+		return 200000000;
 	}
 }
 
@@ -675,12 +674,10 @@
 	if (err == 0)
 		gfx_set_init_done(1);
 	/* Linux relies on VBT for panel info.  */
-	if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM) {
+	if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM)
 		generate_fake_intel_oprom(&conf->gfx, dev, "$VBT CALISTOGA");
-	}
-	if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC) {
+	if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)
 		generate_fake_intel_oprom(&conf->gfx, dev, "$VBT LAKEPORT-G");
-	}
 }
 
 static void gma_func0_init(struct device *dev)
@@ -807,12 +804,11 @@
 
 	/* GNVS has been already set up */
 	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
-	if (gnvs) {
+	if (gnvs)
 		/* IGD OpRegion Base Address */
 		gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion);
-	} else {
+	else
 		printk(BIOS_ERR, "Error: GNVS table not found.\n");
-	}
 
 	current = acpi_align_current(current);
 	return current;

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I489d4b0b1e41cf2437fef05050ed7daa617869ff
Gerrit-Change-Number: 26200
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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