<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26200">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/i945/gma.c: Remove not necessary braces {}<br><br>Braces {} are not necessary for single statement blocks.<br>Not necessary 'Else' staytment removed.<br><br>Change-Id: I489d4b0b1e41cf2437fef05050ed7daa617869ff<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/northbridge/intel/i945/gma.c<br>1 file changed, 17 insertions(+), 21 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/26200/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c</span><br><span>index 6c3d6ae..a6681ea 100644</span><br><span>--- a/src/northbridge/intel/i945/gma.c</span><br><span>+++ b/src/northbridge/intel/i945/gma.c</span><br><span>@@ -384,13 +384,13 @@</span><br><span> </span><br><span>              set_vbe_mode_info_valid(&edid, pgfx);</span><br><span>    } else {</span><br><span style="color: hsl(0, 100%, 40%);">-                        vga_misc_write(0x67);</span><br><span style="color: hsl(120, 100%, 40%);">+         vga_misc_write(0x67);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-                       write32(mmiobase + DSPCNTR(0), DISPPLANE_SEL_PIPE_B);</span><br><span style="color: hsl(0, 100%, 40%);">-                   write32(mmiobase + VGACNTRL, 0x02c4008e</span><br><span style="color: hsl(0, 100%, 40%);">-                         | VGA_PIPE_B_SELECT);</span><br><span style="color: hsl(120, 100%, 40%);">+         write32(mmiobase + DSPCNTR(0), DISPPLANE_SEL_PIPE_B);</span><br><span style="color: hsl(120, 100%, 40%);">+         write32(mmiobase + VGACNTRL, 0x02c4008e</span><br><span style="color: hsl(120, 100%, 40%);">+                       | VGA_PIPE_B_SELECT);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-                       vga_textmode_init();</span><br><span style="color: hsl(120, 100%, 40%);">+          vga_textmode_init();</span><br><span>         }</span><br><span>    return 0;</span><br><span> }</span><br><span>@@ -588,16 +588,15 @@</span><br><span> {</span><br><span>  u16 gcfgc = pci_read_config16(dev, GCFGC);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-  if (gcfgc & GC_LOW_FREQUENCY_ENABLE) {</span><br><span style="color: hsl(120, 100%, 40%);">+    if (gcfgc & GC_LOW_FREQUENCY_ENABLE)</span><br><span>             return 133333333;</span><br><span style="color: hsl(0, 100%, 40%);">-       } else {</span><br><span style="color: hsl(0, 100%, 40%);">-                switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {</span><br><span style="color: hsl(0, 100%, 40%);">-            case GC_DISPLAY_CLOCK_333_320_MHZ:</span><br><span style="color: hsl(0, 100%, 40%);">-                      return 320000000;</span><br><span style="color: hsl(0, 100%, 40%);">-               default:</span><br><span style="color: hsl(0, 100%, 40%);">-                case GC_DISPLAY_CLOCK_190_200_MHZ:</span><br><span style="color: hsl(0, 100%, 40%);">-                      return 200000000;</span><br><span style="color: hsl(0, 100%, 40%);">-               }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+   switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {</span><br><span style="color: hsl(120, 100%, 40%);">+  case GC_DISPLAY_CLOCK_333_320_MHZ:</span><br><span style="color: hsl(120, 100%, 40%);">+            return 320000000;</span><br><span style="color: hsl(120, 100%, 40%);">+     default:</span><br><span style="color: hsl(120, 100%, 40%);">+      case GC_DISPLAY_CLOCK_190_200_MHZ:</span><br><span style="color: hsl(120, 100%, 40%);">+            return 200000000;</span><br><span>    }</span><br><span> }</span><br><span> </span><br><span>@@ -675,12 +674,10 @@</span><br><span>   if (err == 0)</span><br><span>                gfx_set_init_done(1);</span><br><span>        /* Linux relies on VBT for panel info.  */</span><br><span style="color: hsl(0, 100%, 40%);">-      if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM) {</span><br><span style="color: hsl(120, 100%, 40%);">+        if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GM)</span><br><span>                 generate_fake_intel_oprom(&conf->gfx, dev, "$VBT CALISTOGA");</span><br><span style="color: hsl(0, 100%, 40%);">-  }</span><br><span style="color: hsl(0, 100%, 40%);">-       if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC) {</span><br><span style="color: hsl(120, 100%, 40%);">+        if (CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC)</span><br><span>                 generate_fake_intel_oprom(&conf->gfx, dev, "$VBT LAKEPORT-G");</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span> }</span><br><span> </span><br><span> static void gma_func0_init(struct device *dev)</span><br><span>@@ -807,12 +804,11 @@</span><br><span> </span><br><span>     /* GNVS has been already set up */</span><br><span>   gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);</span><br><span style="color: hsl(0, 100%, 40%);">-  if (gnvs) {</span><br><span style="color: hsl(120, 100%, 40%);">+   if (gnvs)</span><br><span>            /* IGD OpRegion Base Address */</span><br><span>              gma_set_gnvs_aslb(gnvs, (uintptr_t)opregion);</span><br><span style="color: hsl(0, 100%, 40%);">-   } else {</span><br><span style="color: hsl(120, 100%, 40%);">+      else</span><br><span>                 printk(BIOS_ERR, "Error: GNVS table not found.\n");</span><br><span style="color: hsl(0, 100%, 40%);">-   }</span><br><span> </span><br><span>        current = acpi_align_current(current);</span><br><span>       return current;</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26200">change 26200</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26200"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I489d4b0b1e41cf2437fef05050ed7daa617869ff </div>
<div style="display:none"> Gerrit-Change-Number: 26200 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>