[coreboot-gerrit] Change in coreboot[master]: mb/google/poppy/variants/nami: Update DPTF table
John Su (Code Review)
gerrit at coreboot.org
Wed May 9 11:10:18 CEST 2018
John Su has uploaded this change for review. ( https://review.coreboot.org/26188
Change subject: mb/google/poppy/variants/nami: Update DPTF table
......................................................................
mb/google/poppy/variants/nami: Update DPTF table
Update dptf.asl form tuning of the thermal.
BUG=b:72974136
TEST=Match the result from DPTF UI.
Change-Id: Ic4b696383f94aad18fe391b2d45257c0ffb21610
Signed-off-by: John Su <john_su at compal.corp-partner.google.com>
---
M src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl
M src/soc/intel/skylake/acpi/dptf/thermal.asl
2 files changed, 68 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/26188/1
diff --git a/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl
index b33dd24..05d5552 100644
--- a/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl
@@ -15,26 +15,31 @@
#define DPTF_CPU_PASSIVE 98
#define DPTF_CPU_CRITICAL 125
-#define DPTF_CPU_ACTIVE_AC0 71
-#define DPTF_CPU_ACTIVE_AC1 69
-#define DPTF_CPU_ACTIVE_AC2 67
-#define DPTF_CPU_ACTIVE_AC3 65
-#define DPTF_CPU_ACTIVE_AC4 60
+#define DPTF_CPU_ACTIVE_AC0 87
+#define DPTF_CPU_ACTIVE_AC1 85
+#define DPTF_CPU_ACTIVE_AC2 83
+#define DPTF_CPU_ACTIVE_AC3 80
+#define DPTF_CPU_ACTIVE_AC4 75
#define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "Thermal_Sensor_Remote_CPU"
#define DPTF_TSR0_PASSIVE 81
#define DPTF_TSR0_CRITICAL 125
-#define DPTF_TSR0_ACTIVE_AC0 62
-#define DPTF_TSR0_ACTIVE_AC1 60
-#define DPTF_TSR0_ACTIVE_AC2 55
-#define DPTF_TSR0_ACTIVE_AC3 50
-#define DPTF_TSR0_ACTIVE_AC4 45
+#define DPTF_TSR0_ACTIVE_AC0 50
+#define DPTF_TSR0_ACTIVE_AC1 47
+#define DPTF_TSR0_ACTIVE_AC2 45
+#define DPTF_TSR0_ACTIVE_AC3 43
+#define DPTF_TSR0_ACTIVE_AC4 41
#define DPTF_TSR1_SENSOR_ID 1
#define DPTF_TSR1_SENSOR_NAME "Thermal_Sensor_Remote_PMIC"
#define DPTF_TSR1_PASSIVE 78
#define DPTF_TSR1_CRITICAL 125
+#define DPTF_TSR1_ACTIVE_AC0 50
+#define DPTF_TSR1_ACTIVE_AC1 47
+#define DPTF_TSR1_ACTIVE_AC2 45
+#define DPTF_TSR1_ACTIVE_AC3 43
+#define DPTF_TSR1_ACTIVE_AC4 41
#define DPTF_ENABLE_CHARGER
#define DPTF_ENABLE_FAN_CONTROL
@@ -57,10 +62,10 @@
*/
/* Control, Trip Point, Speed, NoiseLevel, Power */
Package () {90, 0xFFFFFFFF, 6700, 220, 2200},
- Package () {72, 0xFFFFFFFF, 5800, 180, 1800},
- Package () {59, 0xFFFFFFFF, 5000, 145, 1450},
- Package () {57, 0xFFFFFFFF, 4900, 115, 1150},
- Package () {40, 0xFFFFFFFF, 3900, 90, 900}
+ Package () {69, 0xFFFFFFFF, 5800, 180, 1800},
+ Package () {52, 0xFFFFFFFF, 5000, 145, 1450},
+ Package () {46, 0xFFFFFFFF, 4900, 115, 1150},
+ Package () {36, 0xFFFFFFFF, 3900, 90, 900}
})
Name (DART, Package () {
@@ -71,15 +76,15 @@
* Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6,
* AC7, AC8, AC9
*/
- \_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 100, 90, 72, 59, 40, 0, 0,
+ \_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 90, 69, 52, 46, 36, 0, 0,
0, 0, 0
},
Package () {
- \_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 100, 90, 72, 59, 40, 0, 0,
+ \_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 90, 69, 52, 46, 36, 0, 0,
0, 0, 0
},
Package () {
- \_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 100, 90, 72, 59, 40, 0, 0,
+ \_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 90, 69, 52, 46, 36, 0, 0,
0, 0, 0
}
})
@@ -111,7 +116,7 @@
Package () { /* Power Limit 2 */
1, /* PowerLimitIndex, 1 for Power Limit 2 */
15000, /* PowerLimitMinimum */
- 25000, /* PowerLimitMaximum */
+ 44000, /* PowerLimitMaximum */
28000, /* TimeWindowMinimum */
32000, /* TimeWindowMaximum */
100 /* StepSize */
diff --git a/src/soc/intel/skylake/acpi/dptf/thermal.asl b/src/soc/intel/skylake/acpi/dptf/thermal.asl
index 8290392..cf4723d 100644
--- a/src/soc/intel/skylake/acpi/dptf/thermal.asl
+++ b/src/soc/intel/skylake/acpi/dptf/thermal.asl
@@ -263,6 +263,51 @@
{
\_SB.PCI0.LPCB.EC0.PATD (TMPI)
}
+
+#ifdef DPTF_ENABLE_FAN_CONTROL
+#ifdef DPTF_TSR1_ACTIVE_AC0
+ Method (_AC0)
+ {
+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC0))
+ }
+#endif
+#ifdef DPTF_TSR1_ACTIVE_AC1
+ Method (_AC1)
+ {
+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC1))
+ }
+#endif
+#ifdef DPTF_TSR1_ACTIVE_AC2
+ Method (_AC2)
+ {
+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC2))
+ }
+#endif
+#ifdef DPTF_TSR1_ACTIVE_AC3
+ Method (_AC3)
+ {
+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC3))
+ }
+#endif
+#ifdef DPTF_TSR1_ACTIVE_AC4
+ Method (_AC4)
+ {
+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC4))
+ }
+#endif
+#ifdef DPTF_TSR1_ACTIVE_AC5
+ Method (_AC5)
+ {
+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC5))
+ }
+#endif
+#ifdef DPTF_TSR1_ACTIVE_AC6
+ Method (_AC6)
+ {
+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC6))
+ }
+#endif
+#endif
}
#endif
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic4b696383f94aad18fe391b2d45257c0ffb21610
Gerrit-Change-Number: 26188
Gerrit-PatchSet: 1
Gerrit-Owner: John Su <john_su at compal.corp-partner.google.com>
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