<p>John Su has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26188">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/poppy/variants/nami: Update DPTF table<br><br>Update dptf.asl form tuning of the thermal.<br><br>BUG=b:72974136<br>TEST=Match the result from DPTF UI.<br><br>Change-Id: Ic4b696383f94aad18fe391b2d45257c0ffb21610<br>Signed-off-by: John Su <john_su@compal.corp-partner.google.com><br>---<br>M src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl<br>M src/soc/intel/skylake/acpi/dptf/thermal.asl<br>2 files changed, 68 insertions(+), 18 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/26188/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl</span><br><span>index b33dd24..05d5552 100644</span><br><span>--- a/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl</span><br><span>+++ b/src/mainboard/google/poppy/variants/nami/include/variant/acpi/dptf.asl</span><br><span>@@ -15,26 +15,31 @@</span><br><span> </span><br><span> #define DPTF_CPU_PASSIVE 98</span><br><span> #define DPTF_CPU_CRITICAL 125</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_CPU_ACTIVE_AC0 71</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_CPU_ACTIVE_AC1 69</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_CPU_ACTIVE_AC2 67</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_CPU_ACTIVE_AC3 65</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_CPU_ACTIVE_AC4 60</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_CPU_ACTIVE_AC0 87</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_CPU_ACTIVE_AC1 85</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_CPU_ACTIVE_AC2 83</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_CPU_ACTIVE_AC3 80</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_CPU_ACTIVE_AC4 75</span><br><span> </span><br><span> #define DPTF_TSR0_SENSOR_ID 0</span><br><span> #define DPTF_TSR0_SENSOR_NAME "Thermal_Sensor_Remote_CPU"</span><br><span> #define DPTF_TSR0_PASSIVE 81</span><br><span> #define DPTF_TSR0_CRITICAL 125</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_TSR0_ACTIVE_AC0 62</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_TSR0_ACTIVE_AC1 60</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_TSR0_ACTIVE_AC2 55</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_TSR0_ACTIVE_AC3 50</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_TSR0_ACTIVE_AC4 45</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_TSR0_ACTIVE_AC0 50</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_TSR0_ACTIVE_AC1 47</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_TSR0_ACTIVE_AC2 45</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_TSR0_ACTIVE_AC3 43</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_TSR0_ACTIVE_AC4 41</span><br><span> </span><br><span> #define DPTF_TSR1_SENSOR_ID 1</span><br><span> #define DPTF_TSR1_SENSOR_NAME "Thermal_Sensor_Remote_PMIC"</span><br><span> #define DPTF_TSR1_PASSIVE 78</span><br><span> #define DPTF_TSR1_CRITICAL 125</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_TSR1_ACTIVE_AC0 50</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_TSR1_ACTIVE_AC1 47</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_TSR1_ACTIVE_AC2 45</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_TSR1_ACTIVE_AC3 43</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_TSR1_ACTIVE_AC4 41</span><br><span> </span><br><span> #define DPTF_ENABLE_CHARGER</span><br><span> #define DPTF_ENABLE_FAN_CONTROL</span><br><span>@@ -57,10 +62,10 @@</span><br><span> */</span><br><span> /* Control, Trip Point, Speed, NoiseLevel, Power */</span><br><span> Package () {90, 0xFFFFFFFF, 6700, 220, 2200},</span><br><span style="color: hsl(0, 100%, 40%);">- Package () {72, 0xFFFFFFFF, 5800, 180, 1800},</span><br><span style="color: hsl(0, 100%, 40%);">- Package () {59, 0xFFFFFFFF, 5000, 145, 1450},</span><br><span style="color: hsl(0, 100%, 40%);">- Package () {57, 0xFFFFFFFF, 4900, 115, 1150},</span><br><span style="color: hsl(0, 100%, 40%);">- Package () {40, 0xFFFFFFFF, 3900, 90, 900}</span><br><span style="color: hsl(120, 100%, 40%);">+ Package () {69, 0xFFFFFFFF, 5800, 180, 1800},</span><br><span style="color: hsl(120, 100%, 40%);">+ Package () {52, 0xFFFFFFFF, 5000, 145, 1450},</span><br><span style="color: hsl(120, 100%, 40%);">+ Package () {46, 0xFFFFFFFF, 4900, 115, 1150},</span><br><span style="color: hsl(120, 100%, 40%);">+ Package () {36, 0xFFFFFFFF, 3900, 90, 900}</span><br><span> })</span><br><span> </span><br><span> Name (DART, Package () {</span><br><span>@@ -71,15 +76,15 @@</span><br><span> * Source, Target, Weight, AC0, AC1, AC2, AC3, AC4, AC5, AC6,</span><br><span> * AC7, AC8, AC9</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">- \_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 100, 90, 72, 59, 40, 0, 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ \_SB.DPTF.TFN1, \_SB.PCI0.B0D4, 100, 90, 69, 52, 46, 36, 0, 0,</span><br><span> 0, 0, 0</span><br><span> },</span><br><span> Package () {</span><br><span style="color: hsl(0, 100%, 40%);">- \_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 100, 90, 72, 59, 40, 0, 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ \_SB.DPTF.TFN1, \_SB.DPTF.TSR0, 100, 90, 69, 52, 46, 36, 0, 0,</span><br><span> 0, 0, 0</span><br><span> },</span><br><span> Package () {</span><br><span style="color: hsl(0, 100%, 40%);">- \_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 100, 90, 72, 59, 40, 0, 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ \_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 90, 69, 52, 46, 36, 0, 0,</span><br><span> 0, 0, 0</span><br><span> }</span><br><span> })</span><br><span>@@ -111,7 +116,7 @@</span><br><span> Package () { /* Power Limit 2 */</span><br><span> 1, /* PowerLimitIndex, 1 for Power Limit 2 */</span><br><span> 15000, /* PowerLimitMinimum */</span><br><span style="color: hsl(0, 100%, 40%);">- 25000, /* PowerLimitMaximum */</span><br><span style="color: hsl(120, 100%, 40%);">+ 44000, /* PowerLimitMaximum */</span><br><span> 28000, /* TimeWindowMinimum */</span><br><span> 32000, /* TimeWindowMaximum */</span><br><span> 100 /* StepSize */</span><br><span>diff --git a/src/soc/intel/skylake/acpi/dptf/thermal.asl b/src/soc/intel/skylake/acpi/dptf/thermal.asl</span><br><span>index 8290392..cf4723d 100644</span><br><span>--- a/src/soc/intel/skylake/acpi/dptf/thermal.asl</span><br><span>+++ b/src/soc/intel/skylake/acpi/dptf/thermal.asl</span><br><span>@@ -263,6 +263,51 @@</span><br><span> {</span><br><span> \_SB.PCI0.LPCB.EC0.PATD (TMPI)</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef DPTF_ENABLE_FAN_CONTROL</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef DPTF_TSR1_ACTIVE_AC0</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_AC0)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC0))</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef DPTF_TSR1_ACTIVE_AC1</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_AC1)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC1))</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef DPTF_TSR1_ACTIVE_AC2</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_AC2)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC2))</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef DPTF_TSR1_ACTIVE_AC3</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_AC3)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC3))</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef DPTF_TSR1_ACTIVE_AC4</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_AC4)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC4))</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef DPTF_TSR1_ACTIVE_AC5</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_AC5)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC5))</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef DPTF_TSR1_ACTIVE_AC6</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_AC6)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (\_SB.DPTF.CTOK (DPTF_TSR1_ACTIVE_AC6))</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span> }</span><br><span> #endif</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26188">change 26188</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic4b696383f94aad18fe391b2d45257c0ffb21610 </div>
<div style="display:none"> Gerrit-Change-Number: 26188 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: John Su <john_su@compal.corp-partner.google.com> </div>