[coreboot-gerrit] Change in coreboot[master]: mainboard/intel/kblrvp: Update board id calculation

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/26105


Change subject: mainboard/intel/kblrvp: Update board id calculation
......................................................................

mainboard/intel/kblrvp: Update board id calculation

Kabylake RVP platform is reading board id from EC, higher 8 bits is
board id and lower 8 bits is fab id. Current code is using lower bytes
to determine board id.

BUG=None
TEST=Boot up Kabylake RVP3 platform fine.

Change-Id: I7053de45774a65f091f4e2790faab93ae70731cf
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/mainboard/intel/kblrvp/board_id.c
M src/mainboard/intel/kblrvp/romstage.c
M src/mainboard/intel/kblrvp/spd/Makefile.inc
3 files changed, 5 insertions(+), 2 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/26105/1

diff --git a/src/mainboard/intel/kblrvp/board_id.c b/src/mainboard/intel/kblrvp/board_id.c
index a362b08..c70764a 100644
--- a/src/mainboard/intel/kblrvp/board_id.c
+++ b/src/mainboard/intel/kblrvp/board_id.c
@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */
 #include "board_id.h"
+#include <console/console.h>
 #include <ec/acpi/ec.h>
 #include <stdint.h>
 
@@ -26,6 +27,8 @@
 	if (send_ec_command(EC_FAB_ID_CMD) == 0) {
 		for (index = 0; index < sizeof(buffer); index++)
 			buffer[index] = recv_ec_data();
+		printk(BIOS_DEBUG, "buffer[1]=0x%x\n", buffer[1]);
+		printk(BIOS_DEBUG, "buffer[0]=0x%x\n", buffer[0]);
 		return (buffer[1] << 8) | buffer[0];
 	}
 	return -1;
diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c
index a29a4af..c86c22d 100644
--- a/src/mainboard/intel/kblrvp/romstage.c
+++ b/src/mainboard/intel/kblrvp/romstage.c
@@ -31,7 +31,7 @@
 {
 	FSP_M_CONFIG *mem_cfg;
 	mem_cfg = &mupd->FspmConfig;
-	u8 spd_index = (get_board_id() >> 5) & 0x7;
+	u8 spd_index = (get_board_id() >> 13) & 0x7;
 
 	printk(BIOS_INFO, "SPD index %d\n", spd_index);
 
diff --git a/src/mainboard/intel/kblrvp/spd/Makefile.inc b/src/mainboard/intel/kblrvp/spd/Makefile.inc
index 966dec0..791db62 100644
--- a/src/mainboard/intel/kblrvp/spd/Makefile.inc
+++ b/src/mainboard/intel/kblrvp/spd/Makefile.inc
@@ -21,7 +21,7 @@
 SPD_SOURCES  = rvp3				# 0b000 Dual Channel 4GB
 SPD_SOURCES += empty				# 0b001
 SPD_SOURCES += empty				# 0b010
-SPD_SOURCES += empty				# 0b011
+SPD_SOURCES += hynix_dimm_H9CCNNNBJTMLAR	# 0b011
 SPD_SOURCES += empty				# 0b100
 SPD_SOURCES += empty				# 0b101
 SPD_SOURCES += hynix_dimm_H9CCNNNBJTMLAR	# 0b110 Dual Channel 8GB

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I7053de45774a65f091f4e2790faab93ae70731cf
Gerrit-Change-Number: 26105
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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