<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26105">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mainboard/intel/kblrvp: Update board id calculation<br><br>Kabylake RVP platform is reading board id from EC, higher 8 bits is<br>board id and lower 8 bits is fab id. Current code is using lower bytes<br>to determine board id.<br><br>BUG=None<br>TEST=Boot up Kabylake RVP3 platform fine.<br><br>Change-Id: I7053de45774a65f091f4e2790faab93ae70731cf<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/mainboard/intel/kblrvp/board_id.c<br>M src/mainboard/intel/kblrvp/romstage.c<br>M src/mainboard/intel/kblrvp/spd/Makefile.inc<br>3 files changed, 5 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/26105/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/intel/kblrvp/board_id.c b/src/mainboard/intel/kblrvp/board_id.c</span><br><span>index a362b08..c70764a 100644</span><br><span>--- a/src/mainboard/intel/kblrvp/board_id.c</span><br><span>+++ b/src/mainboard/intel/kblrvp/board_id.c</span><br><span>@@ -13,6 +13,7 @@</span><br><span>  * GNU General Public License for more details.</span><br><span>  */</span><br><span> #include "board_id.h"</span><br><span style="color: hsl(120, 100%, 40%);">+#include <console/console.h></span><br><span> #include <ec/acpi/ec.h></span><br><span> #include <stdint.h></span><br><span> </span><br><span>@@ -26,6 +27,8 @@</span><br><span>  if (send_ec_command(EC_FAB_ID_CMD) == 0) {</span><br><span>           for (index = 0; index < sizeof(buffer); index++)</span><br><span>                  buffer[index] = recv_ec_data();</span><br><span style="color: hsl(120, 100%, 40%);">+               printk(BIOS_DEBUG, "buffer[1]=0x%x\n", buffer[1]);</span><br><span style="color: hsl(120, 100%, 40%);">+          printk(BIOS_DEBUG, "buffer[0]=0x%x\n", buffer[0]);</span><br><span>                 return (buffer[1] << 8) | buffer[0];</span><br><span>   }</span><br><span>    return -1;</span><br><span>diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c</span><br><span>index a29a4af..c86c22d 100644</span><br><span>--- a/src/mainboard/intel/kblrvp/romstage.c</span><br><span>+++ b/src/mainboard/intel/kblrvp/romstage.c</span><br><span>@@ -31,7 +31,7 @@</span><br><span> {</span><br><span>         FSP_M_CONFIG *mem_cfg;</span><br><span>       mem_cfg = &mupd->FspmConfig;</span><br><span style="color: hsl(0, 100%, 40%);">-     u8 spd_index = (get_board_id() >> 5) & 0x7;</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 spd_index = (get_board_id() >> 13) & 0x7;</span><br><span> </span><br><span>   printk(BIOS_INFO, "SPD index %d\n", spd_index);</span><br><span> </span><br><span>diff --git a/src/mainboard/intel/kblrvp/spd/Makefile.inc b/src/mainboard/intel/kblrvp/spd/Makefile.inc</span><br><span>index 966dec0..791db62 100644</span><br><span>--- a/src/mainboard/intel/kblrvp/spd/Makefile.inc</span><br><span>+++ b/src/mainboard/intel/kblrvp/spd/Makefile.inc</span><br><span>@@ -21,7 +21,7 @@</span><br><span> SPD_SOURCES  = rvp3                               # 0b000 Dual Channel 4GB</span><br><span> SPD_SOURCES += empty                                # 0b001</span><br><span> SPD_SOURCES += empty                         # 0b010</span><br><span style="color: hsl(0, 100%, 40%);">-SPD_SOURCES += empty                             # 0b011</span><br><span style="color: hsl(120, 100%, 40%);">+SPD_SOURCES += hynix_dimm_H9CCNNNBJTMLAR       # 0b011</span><br><span> SPD_SOURCES += empty                         # 0b100</span><br><span> SPD_SOURCES += empty                         # 0b101</span><br><span> SPD_SOURCES += hynix_dimm_H9CCNNNBJTMLAR     # 0b110 Dual Channel 8GB</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26105">change 26105</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/26105"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I7053de45774a65f091f4e2790faab93ae70731cf </div>
<div style="display:none"> Gerrit-Change-Number: 26105 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>