[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Add common i2c support for cnl pch

Maulik V Vaghela (Code Review) gerrit at coreboot.org
Fri May 4 14:37:20 CEST 2018


Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/26056


Change subject: soc/intel/common: Add common i2c support for cnl pch
......................................................................

soc/intel/common: Add common i2c support for cnl pch

Add common i2c code support for cannonlake pch configuration. This code
can be common across multiple soc which uses cannonlake pch
configuration for i2c.

This will reduce redundant copy code across soc which uses common i2c
configuration. soc only needs to implement single function which returns
soc based i2c configuration.

BUG=none
BRANCH=none
TEST= code compiles with different configurations.

Change-Id: I88f2f836eee4f80b79486dd8644d1bb3826c5af1
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela at intel.com>
---
M src/soc/intel/common/basecode/pch/cnp/Kconfig
A src/soc/intel/common/basecode/pch/cnp/Makefile.inc
A src/soc/intel/common/basecode/pch/cnp/i2c.c
3 files changed, 74 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/26056/1

diff --git a/src/soc/intel/common/basecode/pch/cnp/Kconfig b/src/soc/intel/common/basecode/pch/cnp/Kconfig
index 07a2a61..6174bbc 100644
--- a/src/soc/intel/common/basecode/pch/cnp/Kconfig
+++ b/src/soc/intel/common/basecode/pch/cnp/Kconfig
@@ -1,6 +1,13 @@
 config SOC_INTEL_COMMON_BASECODE_PCH_CNP
 	bool
 	default n
+	select SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C
 	help
 	  "Select Cannonlake point PCH base support. SOC may select this config
 	   to avail common PCH code"
+
+config SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C
+	bool
+	default n
+	help
+	  "Select common i2c support for cannonlake based pch config."
diff --git a/src/soc/intel/common/basecode/pch/cnp/Makefile.inc b/src/soc/intel/common/basecode/pch/cnp/Makefile.inc
new file mode 100644
index 0000000..4d89df8
--- /dev/null
+++ b/src/soc/intel/common/basecode/pch/cnp/Makefile.inc
@@ -0,0 +1,4 @@
+bootblock-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C) += i2c.c
+romstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C) += i2c.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C) += i2c.c
+verstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C) += i2c.c
diff --git a/src/soc/intel/common/basecode/pch/cnp/i2c.c b/src/soc/intel/common/basecode/pch/cnp/i2c.c
new file mode 100644
index 0000000..e6bcd9a
--- /dev/null
+++ b/src/soc/intel/common/basecode/pch/cnp/i2c.c
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2018 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <device/pci_def.h>
+#include <drivers/i2c/designware/dw_i2c.h>
+#include <soc/iomap.h>
+#include <soc/pci_devs.h>
+
+uintptr_t dw_i2c_get_soc_early_base(unsigned int bus)
+{
+	return EARLY_I2C_BASE(bus);
+}
+
+int dw_i2c_soc_devfn_to_bus(unsigned int devfn)
+{
+	switch (devfn) {
+	case PCH_DEVFN_I2C0:
+		return 0;
+	case PCH_DEVFN_I2C1:
+		return 1;
+	case PCH_DEVFN_I2C2:
+		return 2;
+	case PCH_DEVFN_I2C3:
+		return 3;
+	case PCH_DEVFN_I2C4:
+		return 4;
+	case PCH_DEVFN_I2C5:
+		return 5;
+	}
+	return -1;
+}
+
+int dw_i2c_soc_bus_to_devfn(unsigned int bus)
+{
+	switch (bus) {
+	case 0:
+		return PCH_DEVFN_I2C0;
+	case 1:
+		return PCH_DEVFN_I2C1;
+	case 2:
+		return PCH_DEVFN_I2C2;
+	case 3:
+		return PCH_DEVFN_I2C3;
+	case 4:
+		return PCH_DEVFN_I2C4;
+	case 5:
+		return PCH_DEVFN_I2C5;
+	}
+	return -1;
+}

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I88f2f836eee4f80b79486dd8644d1bb3826c5af1
Gerrit-Change-Number: 26056
Gerrit-PatchSet: 1
Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela at intel.com>
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