<p>Maulik V Vaghela has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/26056">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common: Add common i2c support for cnl pch<br><br>Add common i2c code support for cannonlake pch configuration. This code<br>can be common across multiple soc which uses cannonlake pch<br>configuration for i2c.<br><br>This will reduce redundant copy code across soc which uses common i2c<br>configuration. soc only needs to implement single function which returns<br>soc based i2c configuration.<br><br>BUG=none<br>BRANCH=none<br>TEST= code compiles with different configurations.<br><br>Change-Id: I88f2f836eee4f80b79486dd8644d1bb3826c5af1<br>Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com><br>---<br>M src/soc/intel/common/basecode/pch/cnp/Kconfig<br>A src/soc/intel/common/basecode/pch/cnp/Makefile.inc<br>A src/soc/intel/common/basecode/pch/cnp/i2c.c<br>3 files changed, 74 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/26056/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/common/basecode/pch/cnp/Kconfig b/src/soc/intel/common/basecode/pch/cnp/Kconfig</span><br><span>index 07a2a61..6174bbc 100644</span><br><span>--- a/src/soc/intel/common/basecode/pch/cnp/Kconfig</span><br><span>+++ b/src/soc/intel/common/basecode/pch/cnp/Kconfig</span><br><span>@@ -1,6 +1,13 @@</span><br><span> config SOC_INTEL_COMMON_BASECODE_PCH_CNP</span><br><span> bool</span><br><span> default n</span><br><span style="color: hsl(120, 100%, 40%);">+ select SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C</span><br><span> help</span><br><span> "Select Cannonlake point PCH base support. SOC may select this config</span><br><span> to avail common PCH code"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C</span><br><span style="color: hsl(120, 100%, 40%);">+ bool</span><br><span style="color: hsl(120, 100%, 40%);">+ default n</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ "Select common i2c support for cannonlake based pch config."</span><br><span>diff --git a/src/soc/intel/common/basecode/pch/cnp/Makefile.inc b/src/soc/intel/common/basecode/pch/cnp/Makefile.inc</span><br><span>new file mode 100644</span><br><span>index 0000000..4d89df8</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/intel/common/basecode/pch/cnp/Makefile.inc</span><br><span>@@ -0,0 +1,4 @@</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C) += i2c.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C) += i2c.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C) += i2c.c</span><br><span style="color: hsl(120, 100%, 40%);">+verstage-$(CONFIG_SOC_INTEL_COMMON_BASECODE_PCH_CNP_I2C) += i2c.c</span><br><span>diff --git a/src/soc/intel/common/basecode/pch/cnp/i2c.c b/src/soc/intel/common/basecode/pch/cnp/i2c.c</span><br><span>new file mode 100644</span><br><span>index 0000000..e6bcd9a</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/intel/common/basecode/pch/cnp/i2c.c</span><br><span>@@ -0,0 +1,63 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Intel Corporation.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_def.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <drivers/i2c/designware/dw_i2c.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/iomap.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/pci_devs.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+uintptr_t dw_i2c_get_soc_early_base(unsigned int bus)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ return EARLY_I2C_BASE(bus);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int dw_i2c_soc_devfn_to_bus(unsigned int devfn)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (devfn) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C0:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C1:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C2:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 2;</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C3:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 3;</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C4:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 4;</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCH_DEVFN_I2C5:</span><br><span style="color: hsl(120, 100%, 40%);">+ return 5;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ return -1;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int dw_i2c_soc_bus_to_devfn(unsigned int bus)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (bus) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C0;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C1;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C2;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 3:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C3;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C4;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 5:</span><br><span style="color: hsl(120, 100%, 40%);">+ return PCH_DEVFN_I2C5;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ return -1;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/26056">change 26056</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I88f2f836eee4f80b79486dd8644d1bb3826c5af1 </div>
<div style="display:none"> Gerrit-Change-Number: 26056 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela@intel.com> </div>