[coreboot-gerrit] Change in coreboot[master]: {mb, nb, soc}: Remove references to pci_bus_default_ops()
Nico Huber (Code Review)
gerrit at coreboot.org
Fri May 4 14:31:07 CEST 2018
Nico Huber has uploaded this change for review. ( https://review.coreboot.org/26055
Change subject: {mb,nb,soc}: Remove references to pci_bus_default_ops()
......................................................................
{mb,nb,soc}: Remove references to pci_bus_default_ops()
pci_bus_default_ops() is the default anyway.
Change-Id: I5306d3feea3fc583171d8c865abbe0864b6d9cc6
Signed-off-by: Nico Huber <nico.huber at secunet.com>
---
M Documentation/Intel/SoC/soc.html
M src/mainboard/emulation/qemu-i440fx/northbridge.c
M src/northbridge/amd/agesa/family15tn/northbridge.c
M src/northbridge/amd/agesa/family16kb/northbridge.c
M src/northbridge/amd/amdfam10/northbridge.c
M src/northbridge/amd/amdk8/northbridge.c
M src/northbridge/amd/lx/northbridge.c
M src/northbridge/amd/pi/00630F01/northbridge.c
M src/northbridge/amd/pi/00660F01/northbridge.c
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/intel/e7505/northbridge.c
M src/northbridge/intel/fsp_rangeley/northbridge.c
M src/northbridge/intel/fsp_sandybridge/northbridge.c
M src/northbridge/intel/gm45/northbridge.c
M src/northbridge/intel/haswell/northbridge.c
M src/northbridge/intel/i440bx/northbridge.c
M src/northbridge/intel/i945/northbridge.c
M src/northbridge/intel/nehalem/northbridge.c
M src/northbridge/intel/pineview/northbridge.c
M src/northbridge/intel/sandybridge/northbridge.c
M src/northbridge/intel/x4x/northbridge.c
M src/northbridge/via/cn700/northbridge.c
M src/northbridge/via/cx700/northbridge.c
M src/northbridge/via/vx800/northbridge.c
M src/northbridge/via/vx900/northbridge.c
M src/soc/amd/stoneyridge/chip.c
M src/soc/intel/apollolake/chip.c
M src/soc/intel/baytrail/chip.c
M src/soc/intel/braswell/chip.c
M src/soc/intel/broadwell/chip.c
M src/soc/intel/cannonlake/chip.c
M src/soc/intel/denverton_ns/chip.c
M src/soc/intel/fsp_baytrail/chip.c
M src/soc/intel/fsp_broadwell_de/chip.c
M src/soc/intel/quark/chip.c
M src/soc/intel/skylake/chip.c
M src/soc/intel/skylake/chip_fsp20.c
37 files changed, 0 insertions(+), 37 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/26055/1
diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html
index d91166f..b4804de 100644
--- a/Documentation/Intel/SoC/soc.html
+++ b/Documentation/Intel/SoC/soc.html
@@ -456,7 +456,6 @@
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
</code></pre>
</li>
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c
index 18dcae3..9305ffb 100644
--- a/src/mainboard/emulation/qemu-i440fx/northbridge.c
+++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c
@@ -230,7 +230,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES)
.get_smbios_data = qemu_get_smbios_data,
#endif
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 6face48..f47d312 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -784,7 +784,6 @@
.set_resources = domain_set_resources,
.init = DEVICE_NOOP,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void sysconf_init(device_t dev) // first node
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index 98ed2b8..f667f6f 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -800,7 +800,6 @@
.set_resources = domain_set_resources,
.init = DEVICE_NOOP,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void sysconf_init(device_t dev) // first node
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 61c4465..f50c2ee 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -1326,7 +1326,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = amdfam10_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.acpi_name = amdfam10_domain_acpi_name,
#endif
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 2a92ca2..0a16db4 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -1053,7 +1053,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = amdk8_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void add_more_links(device_t dev, unsigned total_links)
diff --git a/src/northbridge/amd/lx/northbridge.c b/src/northbridge/amd/lx/northbridge.c
index 93ec350..543b691 100644
--- a/src/northbridge/amd/lx/northbridge.c
+++ b/src/northbridge/amd/lx/northbridge.c
@@ -391,7 +391,6 @@
.enable_resources = NULL,
.scan_bus = pci_domain_scan_bus,
.enable = pci_domain_enable,
- .ops_pci_bus = pci_bus_default_ops,
};
static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c
index 74f190c..f542495 100644
--- a/src/northbridge/amd/pi/00630F01/northbridge.c
+++ b/src/northbridge/amd/pi/00630F01/northbridge.c
@@ -800,7 +800,6 @@
.enable_resources = domain_enable_resources,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void sysconf_init(device_t dev) // first node
diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c
index c949a9a..aa2aa1c 100644
--- a/src/northbridge/amd/pi/00660F01/northbridge.c
+++ b/src/northbridge/amd/pi/00660F01/northbridge.c
@@ -802,7 +802,6 @@
.enable_resources = domain_enable_resources,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void sysconf_init(device_t dev) // first node
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 8e8e228..6e652c0e 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -824,7 +824,6 @@
.enable_resources = domain_enable_resources,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
.acpi_name = domain_acpi_name,
};
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index f6e14d6..23012d6 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -114,7 +114,6 @@
.init = NULL,
.scan_bus = pci_domain_scan_bus,
.ops_pci = &intel_pci_ops,
- .ops_pci_bus = pci_bus_default_ops,
};
static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c
index 22e6cee..af652ee 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.c
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.c
@@ -203,7 +203,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static struct device_operations mc_ops = {
diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.c b/src/northbridge/intel/fsp_sandybridge/northbridge.c
index a565b8d..2dfe44d 100644
--- a/src/northbridge/intel/fsp_sandybridge/northbridge.c
+++ b/src/northbridge/intel/fsp_sandybridge/northbridge.c
@@ -233,7 +233,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void mc_read_resources(device_t dev)
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index f682da7..4c42513 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -197,7 +197,6 @@
.enable_resources = NULL,
.init = mch_domain_init,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
.write_acpi_tables = northbridge_write_acpi_tables,
.acpi_fill_ssdt_generator = generate_cpu_entries,
};
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index bbf1604..095c684 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -84,7 +84,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
.write_acpi_tables = northbridge_write_acpi_tables,
};
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 1245be6..b993817 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -79,7 +79,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void cpu_bus_init(struct device *dev)
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 794c61e..eb8e321 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -146,7 +146,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void mc_read_resources(struct device *dev)
diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c
index 37662d5..fa5d595 100644
--- a/src/northbridge/intel/nehalem/northbridge.c
+++ b/src/northbridge/intel/nehalem/northbridge.c
@@ -98,7 +98,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void mc_read_resources(struct device *dev)
diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index 61b9edb..93c7558 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -152,7 +152,6 @@
.set_resources = mch_domain_set_resources,
.init = mch_domain_init,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
.acpi_fill_ssdt_generator = generate_cpu_entries,
};
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 322e4b8..eb8ce26 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -268,7 +268,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
.write_acpi_tables = northbridge_write_acpi_tables,
.acpi_name = northbridge_acpi_name,
};
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index e51c587..3e50229 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -161,7 +161,6 @@
.set_resources = mch_domain_set_resources,
.init = mch_domain_init,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
.write_acpi_tables = northbridge_write_acpi_tables,
.acpi_fill_ssdt_generator = generate_cpu_entries,
};
diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c
index 2121162..f745a0e 100644
--- a/src/northbridge/via/cn700/northbridge.c
+++ b/src/northbridge/via/cn700/northbridge.c
@@ -149,7 +149,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c
index 19bdf11..51e7861 100644
--- a/src/northbridge/via/cx700/northbridge.c
+++ b/src/northbridge/via/cx700/northbridge.c
@@ -104,7 +104,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
.write_acpi_tables = acpi_write_hpet,
};
diff --git a/src/northbridge/via/vx800/northbridge.c b/src/northbridge/via/vx800/northbridge.c
index e6ec3b5..609abf8 100644
--- a/src/northbridge/via/vx800/northbridge.c
+++ b/src/northbridge/via/vx800/northbridge.c
@@ -122,7 +122,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void cpu_bus_init(device_t dev)
diff --git a/src/northbridge/via/vx900/northbridge.c b/src/northbridge/via/vx900/northbridge.c
index 774f744..bf6cb66 100644
--- a/src/northbridge/via/vx900/northbridge.c
+++ b/src/northbridge/via/vx900/northbridge.c
@@ -310,7 +310,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void cpu_bus_init(device_t dev)
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index f5efcfd..08eecb9 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -72,7 +72,6 @@
.set_resources = domain_set_resources,
.enable_resources = domain_enable_resources,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
.acpi_name = soc_acpi_name,
};
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index e4084fe..fee9841 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -132,7 +132,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
.acpi_name = &soc_acpi_name,
};
diff --git a/src/soc/intel/baytrail/chip.c b/src/soc/intel/baytrail/chip.c
index 5c6a891..dab2cd1 100644
--- a/src/soc/intel/baytrail/chip.c
+++ b/src/soc/intel/baytrail/chip.c
@@ -33,7 +33,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static struct device_operations cpu_bus_ops = {
diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c
index 3da5763..49e5ce6 100644
--- a/src/soc/intel/braswell/chip.c
+++ b/src/soc/intel/braswell/chip.c
@@ -36,7 +36,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void cpu_bus_noop(device_t dev) { }
diff --git a/src/soc/intel/broadwell/chip.c b/src/soc/intel/broadwell/chip.c
index c282c6b..ae3248a 100644
--- a/src/soc/intel/broadwell/chip.c
+++ b/src/soc/intel/broadwell/chip.c
@@ -30,7 +30,6 @@
.read_resources = &pci_domain_read_resources,
.set_resources = &pci_domain_set_resources,
.scan_bus = &pci_domain_scan_bus,
- .ops_pci_bus = &pci_bus_default_ops,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.write_acpi_tables = &northbridge_write_acpi_tables,
#endif
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index 49b98ee..b64d804 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -148,7 +148,6 @@
.read_resources = &pci_domain_read_resources,
.set_resources = &pci_domain_set_resources,
.scan_bus = &pci_domain_scan_bus,
- .ops_pci_bus = &pci_bus_default_ops,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.acpi_name = &soc_acpi_name,
#endif
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index a43504c..6600ba2 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -42,7 +42,6 @@
.read_resources = &pci_domain_read_resources,
.set_resources = &pci_domain_set_resources,
.scan_bus = &pci_domain_scan_bus,
- .ops_pci_bus = &pci_bus_default_ops,
};
static struct device_operations cpu_bus_ops = {
diff --git a/src/soc/intel/fsp_baytrail/chip.c b/src/soc/intel/fsp_baytrail/chip.c
index 6bdb7b4..814417a 100644
--- a/src/soc/intel/fsp_baytrail/chip.c
+++ b/src/soc/intel/fsp_baytrail/chip.c
@@ -32,7 +32,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static struct device_operations cpu_bus_ops = {
diff --git a/src/soc/intel/fsp_broadwell_de/chip.c b/src/soc/intel/fsp_broadwell_de/chip.c
index 118fb99..d033374 100644
--- a/src/soc/intel/fsp_broadwell_de/chip.c
+++ b/src/soc/intel/fsp_broadwell_de/chip.c
@@ -45,7 +45,6 @@
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.acpi_name = domain_acpi_name
#endif
diff --git a/src/soc/intel/quark/chip.c b/src/soc/intel/quark/chip.c
index 5e80463..91ab8f5 100644
--- a/src/soc/intel/quark/chip.c
+++ b/src/soc/intel/quark/chip.c
@@ -130,7 +130,6 @@
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.scan_bus = pci_domain_scan_bus,
- .ops_pci_bus = pci_bus_default_ops,
};
static void chip_enable_dev(device_t dev)
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 0c1dfa6..bb2ecaa 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -48,7 +48,6 @@
.read_resources = &pci_domain_read_resources,
.set_resources = &pci_domain_set_resources,
.scan_bus = &pci_domain_scan_bus,
- .ops_pci_bus = &pci_bus_default_ops,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.acpi_name = &soc_acpi_name,
#endif
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 6e91816..0d0821b 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -59,7 +59,6 @@
.read_resources = &pci_domain_read_resources,
.set_resources = &pci_domain_set_resources,
.scan_bus = &pci_domain_scan_bus,
- .ops_pci_bus = &pci_bus_default_ops,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.write_acpi_tables = &northbridge_write_acpi_tables,
.acpi_name = &soc_acpi_name,
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5306d3feea3fc583171d8c865abbe0864b6d9cc6
Gerrit-Change-Number: 26055
Gerrit-PatchSet: 1
Gerrit-Owner: Nico Huber <nico.h at gmx.de>
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