[coreboot-gerrit] Change in coreboot[master]: mainboard/hp/dl145_g1: Remove commented code
Elyes HAOUAS (Code Review)
gerrit at coreboot.org
Wed May 2 18:56:07 CEST 2018
Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/25990
Change subject: mainboard/hp/dl145_g1: Remove commented code
......................................................................
mainboard/hp/dl145_g1: Remove commented code
Change-Id: I4528eb064e8b9c5ebb235ca16e13582df9efd4cd
Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
---
M src/mainboard/hp/dl145_g1/acpi_tables.c
M src/mainboard/hp/dl145_g1/romstage.c
2 files changed, 0 insertions(+), 50 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/25990/1
diff --git a/src/mainboard/hp/dl145_g1/acpi_tables.c b/src/mainboard/hp/dl145_g1/acpi_tables.c
index 1b4ada1..ca6cea0 100644
--- a/src/mainboard/hp/dl145_g1/acpi_tables.c
+++ b/src/mainboard/hp/dl145_g1/acpi_tables.c
@@ -62,51 +62,6 @@
}
}
- /*
- int i;
- int j = 0;
-
- for(i = 1; i< sysconf.hc_possible_num; i++) {
- unsigned d = 0;
- if(!(sysconf.pci1234[i] & 0x1) ) continue;
- // 8131 need to use +4
-
- switch (sysconf.hcid[i]) {
- case 1:
- d = 7;
- break;
- case 3:
- d = 4;
- break;
- }
- switch (sysconf.hcid[i]) {
- case 1:
- case 3:
- dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][0],
- res->base, gsi_base );
- gsi_base+=d;
- }
- }
- dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][1],
- res->base, gsi_base );
- gsi_base+=d;
-
- }
- }
- break;
- }
-
- j++;
- }
- */
}
diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c
index 91f03a7..7406f77 100644
--- a/src/mainboard/hp/dl145_g1/romstage.c
+++ b/src/mainboard/hp/dl145_g1/romstage.c
@@ -125,7 +125,6 @@
printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
setup_dl145g1_resource_map();
- //setup_default_resource_map();
setup_coherent_ht_domain();
wait_all_core0_started();
@@ -182,10 +181,6 @@
change_i2c_mux(i);
}
- //dump_spd_registers(&sysinfo->ctrl[0]);
- //dump_spd_registers(&sysinfo->ctrl[1]);
- //dump_smbus_registers();
-
allow_all_aps_stop(bsp_apicid);
//It's the time to set ctrl now;
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4528eb064e8b9c5ebb235ca16e13582df9efd4cd
Gerrit-Change-Number: 25990
Gerrit-PatchSet: 1
Gerrit-Owner: Elyes HAOUAS <ehaouas at noos.fr>
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