[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Limit xDCI feature when VBOOT is enabled

Duncan Laurie (Code Review) gerrit at coreboot.org
Mon Mar 26 11:47:03 CEST 2018


Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/25364


Change subject: soc/intel/apollolake: Limit xDCI feature when VBOOT is enabled
......................................................................

soc/intel/apollolake: Limit xDCI feature when VBOOT is enabled

Use the common xDCI function to check if the controller is allowed
in the current mode before enabling it.  Otherwise, disable the
PCI device if it has been enabled in devicetree.

Change-Id: I5aea15511c52d1191babf551feb237f4144683e4
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
---
M src/soc/intel/apollolake/chip.c
M src/soc/intel/apollolake/xdci.c
2 files changed, 8 insertions(+), 1 deletion(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/25364/1

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index cac2f11..1dd6daf 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -30,6 +30,7 @@
 #include <intelblocks/fast_spi.h>
 #include <intelblocks/p2sb.h>
 #include <intelblocks/msr.h>
+#include <intelblocks/xdci.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
 #include <intelblocks/cpulib.h>
@@ -585,6 +586,12 @@
 		glk_fsp_silicon_init_params_cb(cfg, silconfig);
 	else
 		apl_fsp_silicon_init_params_cb(cfg, silconfig);
+
+	/* Enable xDCI controller if enabled in devicetree and allowed */
+	dev = dev_find_slot(0, PCH_DEVFN_XDCI);
+	if (!xdci_can_enable())
+		dev->enabled = 0;
+	silconfig->UsbOtg = dev->enabled;
 }
 
 struct chip_operations soc_intel_apollolake_ops = {
diff --git a/src/soc/intel/apollolake/xdci.c b/src/soc/intel/apollolake/xdci.c
index 4c3047c..07207b3 100644
--- a/src/soc/intel/apollolake/xdci.c
+++ b/src/soc/intel/apollolake/xdci.c
@@ -54,7 +54,7 @@
 	 * enabled. If it's disabled assume the switch was already done
 	 * in FSP.
 	 */
-	if (!dev->enabled || !xdci_dev->enabled)
+	if (!dev->enabled || !xdci_dev->enabled || !xdci_can_enable())
 		return;
 
 	printk(BIOS_INFO, "Putting port 0 into host mode.\n");

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5aea15511c52d1191babf551feb237f4144683e4
Gerrit-Change-Number: 25364
Gerrit-PatchSet: 1
Gerrit-Owner: Duncan Laurie <dlaurie at chromium.org>
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