[coreboot-gerrit] Change in coreboot[master]: soc/intel/apollolake: Turn off FSP's deassertion of PERST# signal.

[Shamile Khan (Code Review)]

Shamile Khan has uploaded this change for review. ( https://review.coreboot.org/25311


Change subject: soc/intel/apollolake: Turn off FSP's deassertion of PERST# signal.
......................................................................

soc/intel/apollolake: Turn off FSP's deassertion of PERST# signal.

BUG=b:76058338
BRANCH=None
TEST=Build coreboot for Octopus board.

Change-Id: I1858c7843d16b6b63fc30762a889916bbb9b781a
Signed-off-by: Shamile Khan <shamile.khan at intel.com>
---
M src/soc/intel/apollolake/chip.c
1 file changed, 11 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/25311/1

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index cac2f11..88044d3 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -513,6 +513,17 @@
 	memcpy(silconfig->PcieRpSelectableDeemphasis,
 		cfg->pcie_rp_deemphasis_enable,
 		sizeof(silconfig->PcieRpSelectableDeemphasis));
+
+	/* FSP performs a PERST# signal deassertion for PCIe ports with
+	 * the GPIO address specified in these UPDs. Over-ride the default
+	 * addresses with 0 to turn off PERST# signal deassertion.   
+	 */
+	silconfig->RootPort0Perst = 0;
+	silconfig->RootPort1Perst = 0;
+	silconfig->RootPort2Perst = 0;
+	silconfig->RootPort3Perst = 0;
+	silconfig->RootPort4Perst = 0;
+	silconfig->RootPort5Perst = 0;
 }
 
 void __attribute__((weak)) mainboard_devtree_update(struct device *dev)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I1858c7843d16b6b63fc30762a889916bbb9b781a
Gerrit-Change-Number: 25311
Gerrit-PatchSet: 1
Gerrit-Owner: Shamile Khan <shamile.khan at intel.com>
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