<p>Shamile Khan has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25311">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/apollolake: Turn off FSP's deassertion of PERST# signal.<br><br>BUG=b:76058338<br>BRANCH=None<br>TEST=Build coreboot for Octopus board.<br><br>Change-Id: I1858c7843d16b6b63fc30762a889916bbb9b781a<br>Signed-off-by: Shamile Khan <shamile.khan@intel.com><br>---<br>M src/soc/intel/apollolake/chip.c<br>1 file changed, 11 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/25311/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c</span><br><span>index cac2f11..88044d3 100644</span><br><span>--- a/src/soc/intel/apollolake/chip.c</span><br><span>+++ b/src/soc/intel/apollolake/chip.c</span><br><span>@@ -513,6 +513,17 @@</span><br><span>     memcpy(silconfig->PcieRpSelectableDeemphasis,</span><br><span>             cfg->pcie_rp_deemphasis_enable,</span><br><span>           sizeof(silconfig->PcieRpSelectableDeemphasis));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+  /* FSP performs a PERST# signal deassertion for PCIe ports with</span><br><span style="color: hsl(120, 100%, 40%);">+        * the GPIO address specified in these UPDs. Over-ride the default</span><br><span style="color: hsl(120, 100%, 40%);">+     * addresses with 0 to turn off PERST# signal deassertion.   </span><br><span style="color: hsl(120, 100%, 40%);">+  */</span><br><span style="color: hsl(120, 100%, 40%);">+   silconfig->RootPort0Perst = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+     silconfig->RootPort1Perst = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+     silconfig->RootPort2Perst = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+     silconfig->RootPort3Perst = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+     silconfig->RootPort4Perst = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+     silconfig->RootPort5Perst = 0;</span><br><span> }</span><br><span> </span><br><span> void __attribute__((weak)) mainboard_devtree_update(struct device *dev)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25311">change 25311</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25311"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I1858c7843d16b6b63fc30762a889916bbb9b781a </div>
<div style="display:none"> Gerrit-Change-Number: 25311 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Shamile Khan <shamile.khan@intel.com> </div>