[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add SaGv value definition

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/25116


Change subject: soc/intel/cannonlake: Add SaGv value definition
......................................................................

soc/intel/cannonlake: Add SaGv value definition

SaGv(Sytem Agent Dynamic Frequency) have four settings, disabled,
disabled but running at fixed lower frequency, disabled but running at
fixed middle frquency, disabled but running at fixed high frequency and
totally enabled.

BUG=None.

Change-Id: Ib5fb648179e7889aaa64d91e6cf7a7a7503f4225
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/soc/intel/cannonlake/chip.h
1 file changed, 8 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/25116/1

diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 5e70fae..241f55e 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -107,6 +107,14 @@
 	 * When enabled memory will be training at two different frequencies.
 	 * 0:Disabled, 1:FixedLow, 2:FixedMid, 3:FixedHigh, 4:Enabled */
 	uint8_t SaGv;
+	enum {
+		SaGv_Disabled,
+		SaGv_FixedLow,
+		SaGv_FixedMid,
+		SaGv_FixedHigh,
+		SaGv_Enabled,
+	} MrcSaGv;
+
 
 	/* Rank Margin Tool. 1:Enable, 0:Disable */
 	uint8_t RMT;

-- 
To view, visit https://review.coreboot.org/25116
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib5fb648179e7889aaa64d91e6cf7a7a7503f4225
Gerrit-Change-Number: 25116
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180312/7375e038/attachment-0001.html>