[coreboot-gerrit] Change in coreboot[master]: mb/google/octopus/variants/baseboard: Udpate CPU critical temp

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/27294


Change subject: mb/google/octopus/variants/baseboard: Udpate CPU critical temp
......................................................................

mb/google/octopus/variants/baseboard: Udpate CPU critical temp

Observed thermal shutdown by DPTF due to CPU temperature reaching
critical temperature trip value. This patch updates the CPU critical
temperature and power limit1 value to avoid the abrupt thermal
shutdown by DPTF.

BUG=b:79779737
BRANCH=None
TEST=Build coreboot for Octopus board.

Change-Id: Icd786d3c9b5f7c733dac3fd3e22579e2434058a6
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar at intel.com>
---
M src/mainboard/google/octopus/variants/baseboard/devicetree.cb
M src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
2 files changed, 7 insertions(+), 5 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/27294/1

diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
index 6f71f16..9cab69c 100644
--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
@@ -42,10 +42,11 @@
 	register "gpe0_dw2" = "PMC_GPE_N_95_64"
 	register "gpe0_dw3" = "PMC_GPE_N_63_32"
 
-	# PL1 override 12000 mW: Due to error in the energy calculation for
+	# PL1 override 8000 mW: Due to error in the energy calculation for
 	# current VR solution. Experiments show that SoC TDP max (6W) can
-	# be reached when RAPL PL1 is set to 12W.
-	register "tdp_pl1_override_mw" = "12000"
+	# be reached when RAPL PL1 is set to 8W.
+	# TODO: Need to tune this value on closed chassis system.
+	register "tdp_pl1_override_mw" = "8000"
 	# Set RAPL PL2 to 15W.
 	register "tdp_pl2_override_mw" = "15000"
 
diff --git a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
index 2fafa52..4125e61 100644
--- a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
+++ b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl
@@ -15,7 +15,7 @@
 
 /* Below values might change after Thermal Tuning. */
 #define DPTF_CPU_PASSIVE	90
-#define DPTF_CPU_CRITICAL	99
+#define DPTF_CPU_CRITICAL	105
 
 #define DPTF_TSR0_SENSOR_ID	0
 #define DPTF_TSR0_SENSOR_NAME	"Battery"
@@ -65,7 +65,8 @@
 	Package () {	/* Power Limit 1 */
 		0,	/* PowerLimitIndex, 0 for Power Limit 1 */
 		3000,	/* PowerLimitMinimum */
-		12000,	/* PowerLimitMaximum */
+		/* TODO: Need to tune this value on closed chassis system. */
+		8000,	/* PowerLimitMaximum */
 		1000,	/* TimeWindowMinimum */
 		1000,	/* TimeWindowMaximum */
 		200	/* StepSize */

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Icd786d3c9b5f7c733dac3fd3e22579e2434058a6
Gerrit-Change-Number: 27294
Gerrit-PatchSet: 1
Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar at intel.com>
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