<p>Sumeet R Pawnikar has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27294">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/octopus/variants/baseboard: Udpate CPU critical temp<br><br>Observed thermal shutdown by DPTF due to CPU temperature reaching<br>critical temperature trip value. This patch updates the CPU critical<br>temperature and power limit1 value to avoid the abrupt thermal<br>shutdown by DPTF.<br><br>BUG=b:79779737<br>BRANCH=None<br>TEST=Build coreboot for Octopus board.<br><br>Change-Id: Icd786d3c9b5f7c733dac3fd3e22579e2434058a6<br>Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com><br>---<br>M src/mainboard/google/octopus/variants/baseboard/devicetree.cb<br>M src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl<br>2 files changed, 7 insertions(+), 5 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/27294/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb</span><br><span>index 6f71f16..9cab69c 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb</span><br><span>+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb</span><br><span>@@ -42,10 +42,11 @@</span><br><span>  register "gpe0_dw2" = "PMC_GPE_N_95_64"</span><br><span>  register "gpe0_dw3" = "PMC_GPE_N_63_32"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- # PL1 override 12000 mW: Due to error in the energy calculation for</span><br><span style="color: hsl(120, 100%, 40%);">+   # PL1 override 8000 mW: Due to error in the energy calculation for</span><br><span>   # current VR solution. Experiments show that SoC TDP max (6W) can</span><br><span style="color: hsl(0, 100%, 40%);">-       # be reached when RAPL PL1 is set to 12W.</span><br><span style="color: hsl(0, 100%, 40%);">-       register "tdp_pl1_override_mw" = "12000"</span><br><span style="color: hsl(120, 100%, 40%);">+  # be reached when RAPL PL1 is set to 8W.</span><br><span style="color: hsl(120, 100%, 40%);">+      # TODO: Need to tune this value on closed chassis system.</span><br><span style="color: hsl(120, 100%, 40%);">+     register "tdp_pl1_override_mw" = "8000"</span><br><span>  # Set RAPL PL2 to 15W.</span><br><span>       register "tdp_pl2_override_mw" = "15000"</span><br><span> </span><br><span>diff --git a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl</span><br><span>index 2fafa52..4125e61 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl</span><br><span>+++ b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl</span><br><span>@@ -15,7 +15,7 @@</span><br><span> </span><br><span> /* Below values might change after Thermal Tuning. */</span><br><span> #define DPTF_CPU_PASSIVE  90</span><br><span style="color: hsl(0, 100%, 40%);">-#define DPTF_CPU_CRITICAL     99</span><br><span style="color: hsl(120, 100%, 40%);">+#define DPTF_CPU_CRITICAL   105</span><br><span> </span><br><span> #define DPTF_TSR0_SENSOR_ID  0</span><br><span> #define DPTF_TSR0_SENSOR_NAME      "Battery"</span><br><span>@@ -65,7 +65,8 @@</span><br><span>      Package () {    /* Power Limit 1 */</span><br><span>          0,      /* PowerLimitIndex, 0 for Power Limit 1 */</span><br><span>           3000,   /* PowerLimitMinimum */</span><br><span style="color: hsl(0, 100%, 40%);">-         12000,  /* PowerLimitMaximum */</span><br><span style="color: hsl(120, 100%, 40%);">+               /* TODO: Need to tune this value on closed chassis system. */</span><br><span style="color: hsl(120, 100%, 40%);">+         8000,   /* PowerLimitMaximum */</span><br><span>              1000,   /* TimeWindowMinimum */</span><br><span>              1000,   /* TimeWindowMaximum */</span><br><span>              200     /* StepSize */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27294">change 27294</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27294"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Icd786d3c9b5f7c733dac3fd3e22579e2434058a6 </div>
<div style="display:none"> Gerrit-Change-Number: 27294 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> </div>