[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/pmc: Get rid of pmc_fixup_power_state

[Furquan Shaikh (Code Review)]

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27250


Change subject: soc/intel/common/block/pmc: Get rid of pmc_fixup_power_state
......................................................................

soc/intel/common/block/pmc: Get rid of pmc_fixup_power_state

Now that APL does not need pmc_fixup_power_state, this function can be
removed from the PMC common code as well.

BUG=b:110836465

Change-Id: I94de41f3e52228bca4b7a5579afe5a23719429be
Signed-off-by: Furquan Shaikh <furquan at google.com>
---
M src/soc/intel/common/block/include/intelblocks/pmclib.h
M src/soc/intel/common/block/pmc/pmclib.c
2 files changed, 0 insertions(+), 27 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/27250/1

diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h
index d631f01..ddf384b 100644
--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h
+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h
@@ -150,9 +150,6 @@
  */
 void pmc_global_reset_lock(void);
 
-/* Rewrite the gpe0 registers in cbmem to proper values as per routing table */
-void pmc_fixup_power_state(void);
-
 /* Returns the power state structure */
 struct chipset_power_state *pmc_get_power_state(void);
 
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 38d4196..0795990 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -385,30 +385,6 @@
 	return soc_prev_sleep_state(ps, prev_sleep_state);
 }
 
-/*
- * This function re-writes the gpe0 register values in power state
- * cbmem variable. After system wakes from sleep state internal PMC logic
- * writes default values in GPE_CFG register which gives a wrong offset to
- * calculate the wake reason. So we need to set it again to the routing
- * table as per the devicetree.
- */
-void pmc_fixup_power_state(void)
-{
-	int i;
-	struct chipset_power_state *ps;
-
-	ps = pmc_get_power_state();
-	if (ps == NULL)
-		return;
-
-	for (i = 0; i < GPE0_REG_MAX; i++) {
-		ps->gpe0_sts[i] = inl(ACPI_BASE_ADDRESS + GPE0_STS(i));
-		ps->gpe0_en[i] = inl(ACPI_BASE_ADDRESS + GPE0_EN(i));
-		printk(BIOS_DEBUG, "gpe0_sts[%d]: %08x gpe0_en[%d]: %08x\n",
-		       i, ps->gpe0_sts[i], i, ps->gpe0_en[i]);
-	}
-}
-
 void pmc_fill_pm_reg_info(struct chipset_power_state *ps)
 {
 	int i;

-- 
To view, visit https://review.coreboot.org/27250
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I94de41f3e52228bca4b7a5579afe5a23719429be
Gerrit-Change-Number: 27250
Gerrit-PatchSet: 1
Gerrit-Owner: Furquan Shaikh <furquan at google.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180627/52c97421/attachment-0001.html>