[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge/southbridge.c: Log failed S3 resume

[Richard Spiegel (Code Review)]

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/27110


Change subject: soc/amd/stoneyridge/southbridge.c: Log failed S3 resume
......................................................................

soc/amd/stoneyridge/southbridge.c: Log failed S3 resume

Newly defined structure soc_power_reg includes information on last sleep
type (S3/S5) extracted from power management control register. If the last
sleep type was S3, but code is about to load an OS (normal boot), we have
a situation in which S3 resume failed and was converted into a regular boot.
We need to log this event.

BUG=b:110225041
TEST=The fact that wake_from variable is working was proved in parent
commit. So add code to fake S3 resume in a normal boot. Build and boot
grunt, verify failed S3 resume was logged. Remove fake S3 resume.

Change-Id: I77e13ff30a0ca0e9b21fca47c9b60400129365a7
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
M src/include/elog.h
M src/soc/amd/stoneyridge/include/soc/southbridge.h
M src/soc/amd/stoneyridge/southbridge.c
3 files changed, 20 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/27110/1

diff --git a/src/include/elog.h b/src/include/elog.h
index 0776c36..03ec9a7 100644
--- a/src/include/elog.h
+++ b/src/include/elog.h
@@ -219,6 +219,11 @@
 #define ELOG_TYPE_S0IX_ENTER              0xaf
 #define ELOG_TYPE_S0IX_EXIT               0xb0
 
+/* Detected errors */
+#define ELOG_TYPE_DETECTED_ERROR	  0xb1
+#define  ELOG_ERROR_S3_RESUME		   0x00 /* failed resume, normal boot */
+#define  ELOG_ERROR_SECURITY		   0x01 /* ex: failed TPM */
+
 #if IS_ENABLED(CONFIG_ELOG)
 /* Eventlog backing storage must be initialized before calling elog_init(). */
 extern int elog_init(void);
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 40cf621..ac5033d 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -416,6 +416,7 @@
 void xhci_pm_write32(uint8_t reg, uint32_t value);
 uint32_t xhci_pm_read32(uint8_t reg);
 void bootblock_fch_early_init(void);
+void sb_log_error(uint8_t error);
 /**
  * @brief Save the UMA bize returned by AGESA
  *
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 0f69e5b..651809c 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -514,6 +514,14 @@
 	pci_write_config16(SOC_LPC_DEV, ROM_ADDRESS_RANGE2_END, 0xffff);
 }
 
+void sb_log_error(uint8_t error)
+{
+	if (!IS_ENABLED(CONFIG_ELOG))
+		return;
+
+	elog_add_event_byte(ELOG_TYPE_DETECTED_ERROR, error);
+}
+
 static void sb_lpc_early_setup(void)
 {
 	uint32_t dword;
@@ -748,8 +756,14 @@
 
 void southbridge_final(void *chip_info)
 {
+	struct soc_power_reg *sws;
 	uint8_t restored_power = PM_S5_AT_POWER_RECOVERY;
 
+	sws = cbmem_find(CBMEM_ID_POWER_STATE);
+	if (sws != NULL) {
+		if (sws->wake_from == 3)
+			sb_log_error(ELOG_ERROR_S3_RESUME);
+	}
 	if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)) {
 		agesawrapper_fchecfancontrolservice();
 		if (!IS_ENABLED(CONFIG_ACPI_ENABLE_THERMAL_ZONE))

-- 
To view, visit https://review.coreboot.org/27110
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I77e13ff30a0ca0e9b21fca47c9b60400129365a7
Gerrit-Change-Number: 27110
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180614/7657f37d/attachment.html>