[coreboot-gerrit] Change in coreboot[master]: mainboard/google/nocturne: Set camera power sequence

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/27094


Change subject: mainboard/google/nocturne: Set camera power sequence
......................................................................

mainboard/google/nocturne: Set camera power sequence

To make image senor working, the intended power sequence need to
applied.

BUG=NONE
TEST=NONE

Change-Id: I4833c0e303174b297c1d193495e08e55d294a717
Signed-off-by: Lijian Zhao <lijian.zhao at intel.com>
---
M src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam0.asl
M src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam1.asl
M src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
3 files changed, 63 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/27094/1

diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam0.asl b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam0.asl
index c42188f..7396fc7 100644
--- a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam0.asl
+++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam0.asl
@@ -35,6 +35,34 @@
 				)
 		})
 
+		Method (PMON, 0, Serialized) {
+			CTXS(RCAM_RST_L)
+			STXS(RCAM_PWR_EN)
+			STXS(PCH_RCAM_CLK_EN)
+			Sleep(3)
+			STXS(RCAM_RST_L)
+		}
+
+		Method (PMOF, 0, Serialized) {
+			CTXS(RCAM_RST_L)
+		}
+
+		Name (_PR0, Package (0x01) { RCPR })
+		Name (_PR3, Package (0x01) { RCPR })
+
+		/* Power resource methods for Rear Camera */
+		PowerResource (RCPR, 0, 0) {
+			Method (_ON, 0, Serialized) {
+				PMON()
+			}
+			Method (_OFF, 0, Serialized) {
+				PMOF()
+			}
+			Method (_STA, 0, Serialized) {
+				Return (0x0F)
+			}
+		}
+
 		/* Port0 of CAM0 is connected to port0 of CIO2 device */
 		Name (_DSD, Package () {
 			ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"),
diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam1.asl b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam1.asl
index 1859aaf..029429b 100644
--- a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam1.asl
+++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam1.asl
@@ -34,6 +34,33 @@
 			)
 		})
 
+		Method (PMON, 0, Serialized) {
+			CTXS(FCAM_RST_L)
+			STXS(FCAM_PWR_EN)
+			STXS(PCH_FCAM_CLK_EN)
+			Sleep(3)
+			STXS(FCAM_RST_L)
+		}
+
+		Method (PMOF, 0, Serialized) {
+			CTXS(FCAM_RST_L)
+		}
+
+		Name (_PR0, Package (0x01) { FCPR })
+		Name (_PR3, Package (0x01) { FCPR })
+
+		/* Power resource methods for Rear Camera */
+		PowerResource (FCPR, 0, 0) {
+			Method (_ON, 0, Serialized) {
+				PMON()
+			}
+			Method (_OFF, 0, Serialized) {
+				PMOF()
+			}
+			Method (_STA, 0, Serialized) {
+				Return (0x0F)
+			}
+		}
 
 		/* Port0 of CAM1 is connected to port1 of CIO2 device */
 		Name (_DSD, Package () {
diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h b/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
index 08b51b2..2afb39c 100644
--- a/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
+++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h
@@ -37,4 +37,12 @@
 /* eSPI virtual wire reporting */
 #define EC_SCI_GPI		GPE0_ESPI
 
+/* Camera Sensor config */
+#define RCAM_PWR_EN		GPP_D7
+#define PCH_RCAM_CLK_EN		GPP_D14
+#define RCAM_RST_L		GPP_D16
+#define FCAM_PWR_EN		GPP_D8
+#define PCH_FCAM_CLK_EN		GPP_D13
+#define FCAM_RST_L		GPP_D15
+
 #endif /* BASEBOARD_GPIO_H */

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I4833c0e303174b297c1d193495e08e55d294a717
Gerrit-Change-Number: 27094
Gerrit-PatchSet: 1
Gerrit-Owner: Lijian Zhao <lijian.zhao at intel.com>
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