[coreboot-gerrit] Change in libgfxinit[master]: gma: Turn constants depending on Config.CPU* into functions

Nico Huber (Code Review) gerrit at coreboot.org
Wed Jun 13 01:27:40 CEST 2018


Nico Huber has uploaded this change for review. ( https://review.coreboot.org/27062


Change subject: gma: Turn constants depending on Config.CPU* into functions
......................................................................

gma: Turn constants depending on Config.CPU* into functions

To reduce elaboration time dependencies, turn constants at package
level into functions. This will allow us to use the same code for
configurations with constant and non-constant `GMA.Config.CPU*`.

Change-Id: I0522f5c63c63080bf9633f3d1b6019f35e52d226
Signed-off-by: Nico Huber <nico.h at gmx.de>
---
M common/hw-gfx-gma-pch-fdi.adb
M common/hw-gfx-gma-pch-vga.adb
M common/hw-gfx-gma-pch.ads
M common/ironlake/hw-gfx-gma-connectors-fdi.adb
M common/ironlake/hw-gfx-gma-pch-hdmi.adb
5 files changed, 49 insertions(+), 39 deletions(-)



  git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/62/27062/1

diff --git a/common/hw-gfx-gma-pch-fdi.adb b/common/hw-gfx-gma-pch-fdi.adb
index 0217639..1d2361c 100644
--- a/common/hw-gfx-gma-pch-fdi.adb
+++ b/common/hw-gfx-gma-pch-fdi.adb
@@ -30,15 +30,18 @@
    FDI_RX_CTL_RAWCLK_TO_PCDCLK_SEL_RAWCLK : constant := 0 * 2 **  4;
    FDI_RX_CTL_RAWCLK_TO_PCDCLK_SEL_PCDCLK : constant := 1 * 2 **  4;
 
-   TP_SHIFT : constant := (if Config.Has_Original_ILK_Trans then 28 else 8);
-   FDI_RX_CTL_TRAINING_PATTERN_MASK       : constant := 3 * 2 ** TP_SHIFT;
+   function TP_SHIFT return Natural is
+     (if Config.Has_Original_ILK_Trans then 28 else 8);
 
-   type TP_Array is array (Training_Pattern) of Word32;
-   FDI_RX_CTL_TRAINING_PATTERN : constant TP_Array :=
-     (TP_1     => 0 * 2 ** TP_SHIFT,
-      TP_2     => 1 * 2 ** TP_SHIFT,
-      TP_Idle  => 2 * 2 ** TP_SHIFT,
-      TP_None  => 3 * 2 ** TP_SHIFT);
+   function FDI_RX_CTL_TRAINING_PATTERN_MASK
+      return Word32 is (Shift_Left (3, TP_SHIFT));
+
+   function FDI_RX_CTL_TRAINING_PATTERN (TP : Training_Pattern) return Word32 is
+     (case TP is
+         when TP_1     => Shift_Left (0, TP_SHIFT),
+         when TP_2     => Shift_Left (1, TP_SHIFT),
+         when TP_Idle  => Shift_Left (2, TP_SHIFT),
+         when TP_None  => Shift_Left (3, TP_SHIFT));
 
    function FDI_RX_CTL_PORT_WIDTH_SEL (Lane_Count : DP_Lane_Count) return Word32
    is
diff --git a/common/hw-gfx-gma-pch-vga.adb b/common/hw-gfx-gma-pch-vga.adb
index f090246..fd82740 100644
--- a/common/hw-gfx-gma-pch-vga.adb
+++ b/common/hw-gfx-gma-pch-vga.adb
@@ -29,13 +29,13 @@
    PCH_ADPA_VSYNC_ACTIVE_HIGH : constant := 1 * 2 **  4;
    PCH_ADPA_HSYNC_ACTIVE_HIGH : constant := 1 * 2 **  3;
 
-   PCH_ADPA_MASK : constant Word32 :=
-      PCH_TRANSCODER_SELECT_MASK or
+   function PCH_ADPA_MASK return Word32 is
+     (PCH_TRANSCODER_SELECT_MASK or
       PCH_ADPA_DAC_ENABLE        or
       PCH_ADPA_VSYNC_DISABLE     or
       PCH_ADPA_HSYNC_DISABLE     or
       PCH_ADPA_VSYNC_ACTIVE_HIGH or
-      PCH_ADPA_HSYNC_ACTIVE_HIGH;
+      PCH_ADPA_HSYNC_ACTIVE_HIGH);
 
    ----------------------------------------------------------------------------
 
diff --git a/common/hw-gfx-gma-pch.ads b/common/hw-gfx-gma-pch.ads
index 1e05e90..300e377 100644
--- a/common/hw-gfx-gma-pch.ads
+++ b/common/hw-gfx-gma-pch.ads
@@ -22,16 +22,16 @@
 
    -- common to all PCH outputs
 
-   PCH_TRANSCODER_SELECT_SHIFT : constant :=
+   function PCH_TRANSCODER_SELECT_SHIFT return Natural is
      (if Config.Has_Original_ILK_Trans then 30 else 29);
 
-   PCH_TRANSCODER_SELECT_MASK : constant :=
+   function PCH_TRANSCODER_SELECT_MASK return Word32 is
      (if Config.Has_Original_ILK_Trans then 1 * 2 ** 30 else 3 * 2 ** 29);
 
-   type PCH_TRANSCODER_SELECT_Array is array (FDI_Port_Type) of Word32;
-   PCH_TRANSCODER_SELECT : constant PCH_TRANSCODER_SELECT_Array :=
-     (FDI_A => 0 * 2 ** PCH_TRANSCODER_SELECT_SHIFT,
-      FDI_B => 1 * 2 ** PCH_TRANSCODER_SELECT_SHIFT,
-      FDI_C => 2 * 2 ** PCH_TRANSCODER_SELECT_SHIFT);
+   function PCH_TRANSCODER_SELECT (Port : FDI_Port_Type) return Word32 is
+     (case Port is
+         when FDI_A => Shift_Left (0, PCH_TRANSCODER_SELECT_SHIFT),
+         when FDI_B => Shift_Left (1, PCH_TRANSCODER_SELECT_SHIFT),
+         when FDI_C => Shift_Left (2, PCH_TRANSCODER_SELECT_SHIFT));
 
 end HW.GFX.GMA.PCH;
diff --git a/common/ironlake/hw-gfx-gma-connectors-fdi.adb b/common/ironlake/hw-gfx-gma-connectors-fdi.adb
index 6a41d21..6fd7a1c 100644
--- a/common/ironlake/hw-gfx-gma-connectors-fdi.adb
+++ b/common/ironlake/hw-gfx-gma-connectors-fdi.adb
@@ -14,6 +14,7 @@
 
 with HW.Time;
 with HW.GFX.GMA.Config;
+with HW.GFX.GMA.DP_Info;
 with HW.GFX.GMA.PCH.FDI;
 with HW.GFX.GMA.Registers;
 
@@ -40,12 +41,18 @@
    FDI_TX_CTL_AUTO_TRAIN_ENABLE        : constant :=      1 * 2 ** 10;
    FDI_TX_CTL_AUTO_TRAIN_DONE          : constant :=      1 * 2 **  1;
 
-   TP_SHIFT : constant := (if Config.Has_Ivy_Bridge_FDI then 8 else 28);
-   FDI_TX_CTL_TRAINING_PATTERN_MASK    : constant := 3 * 2 ** TP_SHIFT;
-   FDI_TX_CTL_TRAINING_PATTERN_1       : constant := 0 * 2 ** TP_SHIFT;
-   FDI_TX_CTL_TRAINING_PATTERN_2       : constant := 1 * 2 ** TP_SHIFT;
-   FDI_TX_CTL_TRAINING_PATTERN_IDLE    : constant := 2 * 2 ** TP_SHIFT;
-   FDI_TX_CTL_TRAINING_PATTERN_NORMAL  : constant := 3 * 2 ** TP_SHIFT;
+   function TP_SHIFT return Natural is
+     (if Config.Has_Ivy_Bridge_FDI then 8 else 28);
+   function FDI_TX_CTL_TRAINING_PATTERN_MASK
+      return Word32 is (Shift_Left (3, TP_SHIFT));
+   function FDI_TX_CTL_TRAINING_PATTERN (TP : DP_Info.Training_Pattern)
+      return Word32 is
+     (case TP is
+         when DP_Info.TP_1    => Shift_Left (0, TP_SHIFT),
+         when DP_Info.TP_2    => Shift_Left (1, TP_SHIFT),
+         when DP_Info.TP_Idle => Shift_Left (2, TP_SHIFT),
+         when DP_Info.TP_None => Shift_Left (3, TP_SHIFT),
+         when others          => 0);
 
    subtype FDI_TX_CTL_VP_T is Natural range 0 .. 3;
    type Vswing_Preemph_Values is array (FDI_TX_CTL_VP_T) of Word32;
@@ -88,7 +95,7 @@
             Mask_Set    => FDI_TX_CTL_FDI_TX_ENABLE or
                            FDI_TX_CTL_VSWING_PREEMPH (VP2 / 2) or
                            FDI_TX_CTL_AUTO_TRAIN_ENABLE or
-                           FDI_TX_CTL_TRAINING_PATTERN_1);
+                           FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));
          Registers.Posting_Read (TX_CTL (Port_Cfg.Port));
 
          PCH.FDI.Auto_Train (PCH_FDI_Port);
@@ -109,7 +116,7 @@
             Mask_Unset  => FDI_TX_CTL_FDI_TX_ENABLE or
                            FDI_TX_CTL_AUTO_TRAIN_ENABLE or
                            FDI_TX_CTL_TRAINING_PATTERN_MASK,
-            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN_1);
+            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));
 
          PCH.FDI.Off (PCH_FDI_Port, PCH.FDI.Rx_Off);
       end loop;
@@ -149,7 +156,7 @@
                            FDI_TX_CTL_TRAINING_PATTERN_MASK,
             Mask_Set    => FDI_TX_CTL_FDI_TX_ENABLE or
                            FDI_TX_CTL_VSWING_PREEMPH (VP2 / 2) or
-                           FDI_TX_CTL_TRAINING_PATTERN_1);
+                           FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));
          Registers.Posting_Read (TX_CTL (Port_Cfg.Port));
 
          PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_1, Success);
@@ -158,7 +165,7 @@
             Registers.Unset_And_Set_Mask
               (Register    => TX_CTL (Port_Cfg.Port),
                Mask_Unset  => FDI_TX_CTL_TRAINING_PATTERN_MASK,
-               Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN_2);
+               Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_2));
             Registers.Posting_Read (TX_CTL (Port_Cfg.Port));
 
             PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_2, Success);
@@ -169,7 +176,7 @@
            (Register    => TX_CTL (Port_Cfg.Port),
             Mask_Unset  => FDI_TX_CTL_FDI_TX_ENABLE or
                            FDI_TX_CTL_TRAINING_PATTERN_MASK,
-            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN_1);
+            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));
 
          PCH.FDI.Off (PCH_FDI_Port, PCH.FDI.Rx_Off);
       end loop;
@@ -178,7 +185,7 @@
          Registers.Unset_And_Set_Mask
            (Register    => TX_CTL (Port_Cfg.Port),
             Mask_Unset  => FDI_TX_CTL_TRAINING_PATTERN_MASK,
-            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN_NORMAL);
+            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_None));
          Registers.Posting_Read (TX_CTL (Port_Cfg.Port));
 
          PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_None, Success);
@@ -219,7 +226,7 @@
         (Register    => TX_CTL (Port_Cfg.Port),
          Mask_Unset  => FDI_TX_CTL_TRAINING_PATTERN_MASK,
          Mask_Set    => FDI_TX_CTL_FDI_TX_ENABLE or
-                        FDI_TX_CTL_TRAINING_PATTERN_1);
+                        FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));
       Registers.Posting_Read (TX_CTL (Port_Cfg.Port));
 
       PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_1, Success);
@@ -228,7 +235,7 @@
          Registers.Unset_And_Set_Mask
            (Register    => TX_CTL (Port_Cfg.Port),
             Mask_Unset  => FDI_TX_CTL_TRAINING_PATTERN_MASK,
-            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN_2);
+            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_2));
          Registers.Posting_Read (TX_CTL (Port_Cfg.Port));
 
          PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_2, Success);
@@ -238,7 +245,7 @@
          Registers.Unset_And_Set_Mask
            (Register    => TX_CTL (Port_Cfg.Port),
             Mask_Unset  => FDI_TX_CTL_TRAINING_PATTERN_MASK,
-            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN_NORMAL);
+            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_None));
          Registers.Posting_Read (TX_CTL (Port_Cfg.Port));
 
          PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_None, Success);
@@ -247,7 +254,7 @@
            (Register    => TX_CTL (Port_Cfg.Port),
             Mask_Unset  => FDI_TX_CTL_FDI_TX_ENABLE or
                            FDI_TX_CTL_TRAINING_PATTERN_MASK,
-            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN_1);
+            Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));
          PCH.FDI.Off (PCH_FDI_Port, PCH.FDI.Rx_Off);
 
          Registers.Unset_Mask
@@ -293,7 +300,7 @@
                      FDI_TX_CTL_ENHANCED_FRAMING_ENABLE or
                      FDI_TX_CTL_FDI_PLL_ENABLE or
                      Composite_Sel or
-                     FDI_TX_CTL_TRAINING_PATTERN_1);
+                     FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));
       Registers.Posting_Read (TX_CTL (Port_Cfg.Port));
       Time.U_Delay (100);
    end Pre_On;
@@ -327,7 +334,7 @@
          Mask_Unset  => FDI_TX_CTL_FDI_TX_ENABLE or
                         FDI_TX_CTL_AUTO_TRAIN_ENABLE or
                         FDI_TX_CTL_TRAINING_PATTERN_MASK,
-         Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN_1);
+         Mask_Set    => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));
 
       PCH.FDI.Off (PCH_FDI_Port, PCH.FDI.Rx_Off);
 
diff --git a/common/ironlake/hw-gfx-gma-pch-hdmi.adb b/common/ironlake/hw-gfx-gma-pch-hdmi.adb
index e53d85a..aaf7951 100644
--- a/common/ironlake/hw-gfx-gma-pch-hdmi.adb
+++ b/common/ironlake/hw-gfx-gma-pch-hdmi.adb
@@ -31,13 +31,13 @@
    PCH_HDMI_HSYNC_ACTIVE_HIGH    : constant := 1 * 2 **  3;
    PCH_HDMI_PORT_DETECT          : constant := 1 * 2 **  2;
 
-   PCH_HDMI_MASK : constant Word32 :=
-      PCH_TRANSCODER_SELECT_MASK or
+   function PCH_HDMI_MASK return Word32 is
+     (PCH_TRANSCODER_SELECT_MASK or
       PCH_HDMI_ENABLE or
       PCH_HDMI_COLOR_FORMAT_MASK or
       PCH_HDMI_SDVO_ENCODING_MASK or
       PCH_HDMI_HSYNC_ACTIVE_HIGH or
-      PCH_HDMI_VSYNC_ACTIVE_HIGH;
+      PCH_HDMI_VSYNC_ACTIVE_HIGH);
 
    type PCH_HDMI_Array is array (PCH_HDMI_Port) of Registers.Registers_Index;
    PCH_HDMI : constant PCH_HDMI_Array := PCH_HDMI_Array'

-- 
To view, visit https://review.coreboot.org/27062
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: libgfxinit
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I0522f5c63c63080bf9633f3d1b6019f35e52d226
Gerrit-Change-Number: 27062
Gerrit-PatchSet: 1
Gerrit-Owner: Nico Huber <nico.h at gmx.de>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://mail.coreboot.org/pipermail/coreboot-gerrit/attachments/20180612/6f71ebec/attachment-0001.html>


More information about the coreboot-gerrit mailing list