<p>Nico Huber has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27062">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">gma: Turn constants depending on Config.CPU* into functions<br><br>To reduce elaboration time dependencies, turn constants at package<br>level into functions. This will allow us to use the same code for<br>configurations with constant and non-constant `GMA.Config.CPU*`.<br><br>Change-Id: I0522f5c63c63080bf9633f3d1b6019f35e52d226<br>Signed-off-by: Nico Huber <nico.h@gmx.de><br>---<br>M common/hw-gfx-gma-pch-fdi.adb<br>M common/hw-gfx-gma-pch-vga.adb<br>M common/hw-gfx-gma-pch.ads<br>M common/ironlake/hw-gfx-gma-connectors-fdi.adb<br>M common/ironlake/hw-gfx-gma-pch-hdmi.adb<br>5 files changed, 49 insertions(+), 39 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/62/27062/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/common/hw-gfx-gma-pch-fdi.adb b/common/hw-gfx-gma-pch-fdi.adb</span><br><span>index 0217639..1d2361c 100644</span><br><span>--- a/common/hw-gfx-gma-pch-fdi.adb</span><br><span>+++ b/common/hw-gfx-gma-pch-fdi.adb</span><br><span>@@ -30,15 +30,18 @@</span><br><span> FDI_RX_CTL_RAWCLK_TO_PCDCLK_SEL_RAWCLK : constant := 0 * 2 ** 4;</span><br><span> FDI_RX_CTL_RAWCLK_TO_PCDCLK_SEL_PCDCLK : constant := 1 * 2 ** 4;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- TP_SHIFT : constant := (if Config.Has_Original_ILK_Trans then 28 else 8);</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_RX_CTL_TRAINING_PATTERN_MASK : constant := 3 * 2 ** TP_SHIFT;</span><br><span style="color: hsl(120, 100%, 40%);">+ function TP_SHIFT return Natural is</span><br><span style="color: hsl(120, 100%, 40%);">+ (if Config.Has_Original_ILK_Trans then 28 else 8);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- type TP_Array is array (Training_Pattern) of Word32;</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_RX_CTL_TRAINING_PATTERN : constant TP_Array :=</span><br><span style="color: hsl(0, 100%, 40%);">- (TP_1 => 0 * 2 ** TP_SHIFT,</span><br><span style="color: hsl(0, 100%, 40%);">- TP_2 => 1 * 2 ** TP_SHIFT,</span><br><span style="color: hsl(0, 100%, 40%);">- TP_Idle => 2 * 2 ** TP_SHIFT,</span><br><span style="color: hsl(0, 100%, 40%);">- TP_None => 3 * 2 ** TP_SHIFT);</span><br><span style="color: hsl(120, 100%, 40%);">+ function FDI_RX_CTL_TRAINING_PATTERN_MASK</span><br><span style="color: hsl(120, 100%, 40%);">+ return Word32 is (Shift_Left (3, TP_SHIFT));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ function FDI_RX_CTL_TRAINING_PATTERN (TP : Training_Pattern) return Word32 is</span><br><span style="color: hsl(120, 100%, 40%);">+ (case TP is</span><br><span style="color: hsl(120, 100%, 40%);">+ when TP_1 => Shift_Left (0, TP_SHIFT),</span><br><span style="color: hsl(120, 100%, 40%);">+ when TP_2 => Shift_Left (1, TP_SHIFT),</span><br><span style="color: hsl(120, 100%, 40%);">+ when TP_Idle => Shift_Left (2, TP_SHIFT),</span><br><span style="color: hsl(120, 100%, 40%);">+ when TP_None => Shift_Left (3, TP_SHIFT));</span><br><span> </span><br><span> function FDI_RX_CTL_PORT_WIDTH_SEL (Lane_Count : DP_Lane_Count) return Word32</span><br><span> is</span><br><span>diff --git a/common/hw-gfx-gma-pch-vga.adb b/common/hw-gfx-gma-pch-vga.adb</span><br><span>index f090246..fd82740 100644</span><br><span>--- a/common/hw-gfx-gma-pch-vga.adb</span><br><span>+++ b/common/hw-gfx-gma-pch-vga.adb</span><br><span>@@ -29,13 +29,13 @@</span><br><span> PCH_ADPA_VSYNC_ACTIVE_HIGH : constant := 1 * 2 ** 4;</span><br><span> PCH_ADPA_HSYNC_ACTIVE_HIGH : constant := 1 * 2 ** 3;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- PCH_ADPA_MASK : constant Word32 :=</span><br><span style="color: hsl(0, 100%, 40%);">- PCH_TRANSCODER_SELECT_MASK or</span><br><span style="color: hsl(120, 100%, 40%);">+ function PCH_ADPA_MASK return Word32 is</span><br><span style="color: hsl(120, 100%, 40%);">+ (PCH_TRANSCODER_SELECT_MASK or</span><br><span> PCH_ADPA_DAC_ENABLE or</span><br><span> PCH_ADPA_VSYNC_DISABLE or</span><br><span> PCH_ADPA_HSYNC_DISABLE or</span><br><span> PCH_ADPA_VSYNC_ACTIVE_HIGH or</span><br><span style="color: hsl(0, 100%, 40%);">- PCH_ADPA_HSYNC_ACTIVE_HIGH;</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_ADPA_HSYNC_ACTIVE_HIGH);</span><br><span> </span><br><span> ----------------------------------------------------------------------------</span><br><span> </span><br><span>diff --git a/common/hw-gfx-gma-pch.ads b/common/hw-gfx-gma-pch.ads</span><br><span>index 1e05e90..300e377 100644</span><br><span>--- a/common/hw-gfx-gma-pch.ads</span><br><span>+++ b/common/hw-gfx-gma-pch.ads</span><br><span>@@ -22,16 +22,16 @@</span><br><span> </span><br><span> -- common to all PCH outputs</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- PCH_TRANSCODER_SELECT_SHIFT : constant :=</span><br><span style="color: hsl(120, 100%, 40%);">+ function PCH_TRANSCODER_SELECT_SHIFT return Natural is</span><br><span> (if Config.Has_Original_ILK_Trans then 30 else 29);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- PCH_TRANSCODER_SELECT_MASK : constant :=</span><br><span style="color: hsl(120, 100%, 40%);">+ function PCH_TRANSCODER_SELECT_MASK return Word32 is</span><br><span> (if Config.Has_Original_ILK_Trans then 1 * 2 ** 30 else 3 * 2 ** 29);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- type PCH_TRANSCODER_SELECT_Array is array (FDI_Port_Type) of Word32;</span><br><span style="color: hsl(0, 100%, 40%);">- PCH_TRANSCODER_SELECT : constant PCH_TRANSCODER_SELECT_Array :=</span><br><span style="color: hsl(0, 100%, 40%);">- (FDI_A => 0 * 2 ** PCH_TRANSCODER_SELECT_SHIFT,</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_B => 1 * 2 ** PCH_TRANSCODER_SELECT_SHIFT,</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_C => 2 * 2 ** PCH_TRANSCODER_SELECT_SHIFT);</span><br><span style="color: hsl(120, 100%, 40%);">+ function PCH_TRANSCODER_SELECT (Port : FDI_Port_Type) return Word32 is</span><br><span style="color: hsl(120, 100%, 40%);">+ (case Port is</span><br><span style="color: hsl(120, 100%, 40%);">+ when FDI_A => Shift_Left (0, PCH_TRANSCODER_SELECT_SHIFT),</span><br><span style="color: hsl(120, 100%, 40%);">+ when FDI_B => Shift_Left (1, PCH_TRANSCODER_SELECT_SHIFT),</span><br><span style="color: hsl(120, 100%, 40%);">+ when FDI_C => Shift_Left (2, PCH_TRANSCODER_SELECT_SHIFT));</span><br><span> </span><br><span> end HW.GFX.GMA.PCH;</span><br><span>diff --git a/common/ironlake/hw-gfx-gma-connectors-fdi.adb b/common/ironlake/hw-gfx-gma-connectors-fdi.adb</span><br><span>index 6a41d21..6fd7a1c 100644</span><br><span>--- a/common/ironlake/hw-gfx-gma-connectors-fdi.adb</span><br><span>+++ b/common/ironlake/hw-gfx-gma-connectors-fdi.adb</span><br><span>@@ -14,6 +14,7 @@</span><br><span> </span><br><span> with HW.Time;</span><br><span> with HW.GFX.GMA.Config;</span><br><span style="color: hsl(120, 100%, 40%);">+with HW.GFX.GMA.DP_Info;</span><br><span> with HW.GFX.GMA.PCH.FDI;</span><br><span> with HW.GFX.GMA.Registers;</span><br><span> </span><br><span>@@ -40,12 +41,18 @@</span><br><span> FDI_TX_CTL_AUTO_TRAIN_ENABLE : constant := 1 * 2 ** 10;</span><br><span> FDI_TX_CTL_AUTO_TRAIN_DONE : constant := 1 * 2 ** 1;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- TP_SHIFT : constant := (if Config.Has_Ivy_Bridge_FDI then 8 else 28);</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_TX_CTL_TRAINING_PATTERN_MASK : constant := 3 * 2 ** TP_SHIFT;</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_TX_CTL_TRAINING_PATTERN_1 : constant := 0 * 2 ** TP_SHIFT;</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_TX_CTL_TRAINING_PATTERN_2 : constant := 1 * 2 ** TP_SHIFT;</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_TX_CTL_TRAINING_PATTERN_IDLE : constant := 2 * 2 ** TP_SHIFT;</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_TX_CTL_TRAINING_PATTERN_NORMAL : constant := 3 * 2 ** TP_SHIFT;</span><br><span style="color: hsl(120, 100%, 40%);">+ function TP_SHIFT return Natural is</span><br><span style="color: hsl(120, 100%, 40%);">+ (if Config.Has_Ivy_Bridge_FDI then 8 else 28);</span><br><span style="color: hsl(120, 100%, 40%);">+ function FDI_TX_CTL_TRAINING_PATTERN_MASK</span><br><span style="color: hsl(120, 100%, 40%);">+ return Word32 is (Shift_Left (3, TP_SHIFT));</span><br><span style="color: hsl(120, 100%, 40%);">+ function FDI_TX_CTL_TRAINING_PATTERN (TP : DP_Info.Training_Pattern)</span><br><span style="color: hsl(120, 100%, 40%);">+ return Word32 is</span><br><span style="color: hsl(120, 100%, 40%);">+ (case TP is</span><br><span style="color: hsl(120, 100%, 40%);">+ when DP_Info.TP_1 => Shift_Left (0, TP_SHIFT),</span><br><span style="color: hsl(120, 100%, 40%);">+ when DP_Info.TP_2 => Shift_Left (1, TP_SHIFT),</span><br><span style="color: hsl(120, 100%, 40%);">+ when DP_Info.TP_Idle => Shift_Left (2, TP_SHIFT),</span><br><span style="color: hsl(120, 100%, 40%);">+ when DP_Info.TP_None => Shift_Left (3, TP_SHIFT),</span><br><span style="color: hsl(120, 100%, 40%);">+ when others => 0);</span><br><span> </span><br><span> subtype FDI_TX_CTL_VP_T is Natural range 0 .. 3;</span><br><span> type Vswing_Preemph_Values is array (FDI_TX_CTL_VP_T) of Word32;</span><br><span>@@ -88,7 +95,7 @@</span><br><span> Mask_Set => FDI_TX_CTL_FDI_TX_ENABLE or</span><br><span> FDI_TX_CTL_VSWING_PREEMPH (VP2 / 2) or</span><br><span> FDI_TX_CTL_AUTO_TRAIN_ENABLE or</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_TX_CTL_TRAINING_PATTERN_1);</span><br><span style="color: hsl(120, 100%, 40%);">+ FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));</span><br><span> Registers.Posting_Read (TX_CTL (Port_Cfg.Port));</span><br><span> </span><br><span> PCH.FDI.Auto_Train (PCH_FDI_Port);</span><br><span>@@ -109,7 +116,7 @@</span><br><span> Mask_Unset => FDI_TX_CTL_FDI_TX_ENABLE or</span><br><span> FDI_TX_CTL_AUTO_TRAIN_ENABLE or</span><br><span> FDI_TX_CTL_TRAINING_PATTERN_MASK,</span><br><span style="color: hsl(0, 100%, 40%);">- Mask_Set => FDI_TX_CTL_TRAINING_PATTERN_1);</span><br><span style="color: hsl(120, 100%, 40%);">+ Mask_Set => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));</span><br><span> </span><br><span> PCH.FDI.Off (PCH_FDI_Port, PCH.FDI.Rx_Off);</span><br><span> end loop;</span><br><span>@@ -149,7 +156,7 @@</span><br><span> FDI_TX_CTL_TRAINING_PATTERN_MASK,</span><br><span> Mask_Set => FDI_TX_CTL_FDI_TX_ENABLE or</span><br><span> FDI_TX_CTL_VSWING_PREEMPH (VP2 / 2) or</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_TX_CTL_TRAINING_PATTERN_1);</span><br><span style="color: hsl(120, 100%, 40%);">+ FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));</span><br><span> Registers.Posting_Read (TX_CTL (Port_Cfg.Port));</span><br><span> </span><br><span> PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_1, Success);</span><br><span>@@ -158,7 +165,7 @@</span><br><span> Registers.Unset_And_Set_Mask</span><br><span> (Register => TX_CTL (Port_Cfg.Port),</span><br><span> Mask_Unset => FDI_TX_CTL_TRAINING_PATTERN_MASK,</span><br><span style="color: hsl(0, 100%, 40%);">- Mask_Set => FDI_TX_CTL_TRAINING_PATTERN_2);</span><br><span style="color: hsl(120, 100%, 40%);">+ Mask_Set => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_2));</span><br><span> Registers.Posting_Read (TX_CTL (Port_Cfg.Port));</span><br><span> </span><br><span> PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_2, Success);</span><br><span>@@ -169,7 +176,7 @@</span><br><span> (Register => TX_CTL (Port_Cfg.Port),</span><br><span> Mask_Unset => FDI_TX_CTL_FDI_TX_ENABLE or</span><br><span> FDI_TX_CTL_TRAINING_PATTERN_MASK,</span><br><span style="color: hsl(0, 100%, 40%);">- Mask_Set => FDI_TX_CTL_TRAINING_PATTERN_1);</span><br><span style="color: hsl(120, 100%, 40%);">+ Mask_Set => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));</span><br><span> </span><br><span> PCH.FDI.Off (PCH_FDI_Port, PCH.FDI.Rx_Off);</span><br><span> end loop;</span><br><span>@@ -178,7 +185,7 @@</span><br><span> Registers.Unset_And_Set_Mask</span><br><span> (Register => TX_CTL (Port_Cfg.Port),</span><br><span> Mask_Unset => FDI_TX_CTL_TRAINING_PATTERN_MASK,</span><br><span style="color: hsl(0, 100%, 40%);">- Mask_Set => FDI_TX_CTL_TRAINING_PATTERN_NORMAL);</span><br><span style="color: hsl(120, 100%, 40%);">+ Mask_Set => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_None));</span><br><span> Registers.Posting_Read (TX_CTL (Port_Cfg.Port));</span><br><span> </span><br><span> PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_None, Success);</span><br><span>@@ -219,7 +226,7 @@</span><br><span> (Register => TX_CTL (Port_Cfg.Port),</span><br><span> Mask_Unset => FDI_TX_CTL_TRAINING_PATTERN_MASK,</span><br><span> Mask_Set => FDI_TX_CTL_FDI_TX_ENABLE or</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_TX_CTL_TRAINING_PATTERN_1);</span><br><span style="color: hsl(120, 100%, 40%);">+ FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));</span><br><span> Registers.Posting_Read (TX_CTL (Port_Cfg.Port));</span><br><span> </span><br><span> PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_1, Success);</span><br><span>@@ -228,7 +235,7 @@</span><br><span> Registers.Unset_And_Set_Mask</span><br><span> (Register => TX_CTL (Port_Cfg.Port),</span><br><span> Mask_Unset => FDI_TX_CTL_TRAINING_PATTERN_MASK,</span><br><span style="color: hsl(0, 100%, 40%);">- Mask_Set => FDI_TX_CTL_TRAINING_PATTERN_2);</span><br><span style="color: hsl(120, 100%, 40%);">+ Mask_Set => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_2));</span><br><span> Registers.Posting_Read (TX_CTL (Port_Cfg.Port));</span><br><span> </span><br><span> PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_2, Success);</span><br><span>@@ -238,7 +245,7 @@</span><br><span> Registers.Unset_And_Set_Mask</span><br><span> (Register => TX_CTL (Port_Cfg.Port),</span><br><span> Mask_Unset => FDI_TX_CTL_TRAINING_PATTERN_MASK,</span><br><span style="color: hsl(0, 100%, 40%);">- Mask_Set => FDI_TX_CTL_TRAINING_PATTERN_NORMAL);</span><br><span style="color: hsl(120, 100%, 40%);">+ Mask_Set => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_None));</span><br><span> Registers.Posting_Read (TX_CTL (Port_Cfg.Port));</span><br><span> </span><br><span> PCH.FDI.Train (PCH_FDI_Port, PCH.FDI.TP_None, Success);</span><br><span>@@ -247,7 +254,7 @@</span><br><span> (Register => TX_CTL (Port_Cfg.Port),</span><br><span> Mask_Unset => FDI_TX_CTL_FDI_TX_ENABLE or</span><br><span> FDI_TX_CTL_TRAINING_PATTERN_MASK,</span><br><span style="color: hsl(0, 100%, 40%);">- Mask_Set => FDI_TX_CTL_TRAINING_PATTERN_1);</span><br><span style="color: hsl(120, 100%, 40%);">+ Mask_Set => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));</span><br><span> PCH.FDI.Off (PCH_FDI_Port, PCH.FDI.Rx_Off);</span><br><span> </span><br><span> Registers.Unset_Mask</span><br><span>@@ -293,7 +300,7 @@</span><br><span> FDI_TX_CTL_ENHANCED_FRAMING_ENABLE or</span><br><span> FDI_TX_CTL_FDI_PLL_ENABLE or</span><br><span> Composite_Sel or</span><br><span style="color: hsl(0, 100%, 40%);">- FDI_TX_CTL_TRAINING_PATTERN_1);</span><br><span style="color: hsl(120, 100%, 40%);">+ FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));</span><br><span> Registers.Posting_Read (TX_CTL (Port_Cfg.Port));</span><br><span> Time.U_Delay (100);</span><br><span> end Pre_On;</span><br><span>@@ -327,7 +334,7 @@</span><br><span> Mask_Unset => FDI_TX_CTL_FDI_TX_ENABLE or</span><br><span> FDI_TX_CTL_AUTO_TRAIN_ENABLE or</span><br><span> FDI_TX_CTL_TRAINING_PATTERN_MASK,</span><br><span style="color: hsl(0, 100%, 40%);">- Mask_Set => FDI_TX_CTL_TRAINING_PATTERN_1);</span><br><span style="color: hsl(120, 100%, 40%);">+ Mask_Set => FDI_TX_CTL_TRAINING_PATTERN (DP_Info.TP_1));</span><br><span> </span><br><span> PCH.FDI.Off (PCH_FDI_Port, PCH.FDI.Rx_Off);</span><br><span> </span><br><span>diff --git a/common/ironlake/hw-gfx-gma-pch-hdmi.adb b/common/ironlake/hw-gfx-gma-pch-hdmi.adb</span><br><span>index e53d85a..aaf7951 100644</span><br><span>--- a/common/ironlake/hw-gfx-gma-pch-hdmi.adb</span><br><span>+++ b/common/ironlake/hw-gfx-gma-pch-hdmi.adb</span><br><span>@@ -31,13 +31,13 @@</span><br><span> PCH_HDMI_HSYNC_ACTIVE_HIGH : constant := 1 * 2 ** 3;</span><br><span> PCH_HDMI_PORT_DETECT : constant := 1 * 2 ** 2;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- PCH_HDMI_MASK : constant Word32 :=</span><br><span style="color: hsl(0, 100%, 40%);">- PCH_TRANSCODER_SELECT_MASK or</span><br><span style="color: hsl(120, 100%, 40%);">+ function PCH_HDMI_MASK return Word32 is</span><br><span style="color: hsl(120, 100%, 40%);">+ (PCH_TRANSCODER_SELECT_MASK or</span><br><span> PCH_HDMI_ENABLE or</span><br><span> PCH_HDMI_COLOR_FORMAT_MASK or</span><br><span> PCH_HDMI_SDVO_ENCODING_MASK or</span><br><span> PCH_HDMI_HSYNC_ACTIVE_HIGH or</span><br><span style="color: hsl(0, 100%, 40%);">- PCH_HDMI_VSYNC_ACTIVE_HIGH;</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_HDMI_VSYNC_ACTIVE_HIGH);</span><br><span> </span><br><span> type PCH_HDMI_Array is array (PCH_HDMI_Port) of Registers.Registers_Index;</span><br><span> PCH_HDMI : constant PCH_HDMI_Array := PCH_HDMI_Array'</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27062">change 27062</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27062"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: libgfxinit </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0522f5c63c63080bf9633f3d1b6019f35e52d226 </div>
<div style="display:none"> Gerrit-Change-Number: 27062 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nico Huber <nico.h@gmx.de> </div>