[coreboot-gerrit] Change in coreboot[master]: sb/intel/i82801gx: Select INTEL_HAS_TOP_SWAP

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/27748


Change subject: sb/intel/i82801gx: Select INTEL_HAS_TOP_SWAP
......................................................................

sb/intel/i82801gx: Select INTEL_HAS_TOP_SWAP

The i82801gx southbridge has the ability to swap the two top 64K ranges by
flipping the BUC.TS bit (RCBA[3414] bit0)
This effectively means it is possible to run another bootblock located at
top_of_flash - 64K.

This allows coreboot to build roms with a bootblock at the top swap offset by
selecting CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK.

Change-Id: Id96e10aea3e5fd955d45287134eb8643be414de9
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
M src/southbridge/intel/i82801gx/Kconfig
1 file changed, 5 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/27748/1

diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig
index 7e48848..f06ba42 100644
--- a/src/southbridge/intel/i82801gx/Kconfig
+++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -28,6 +28,7 @@
 	select SOUTHBRIDGE_INTEL_COMMON_SPI
 	select HAVE_INTEL_CHIPSET_LOCKDOWN
 	select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
+	select INTEL_HAS_TOP_SWAP
 
 if SOUTHBRIDGE_INTEL_I82801GX
 
@@ -43,4 +44,8 @@
 	hex
 	default 0x80
 
+config INTEL_TOP_SWAP_SIZE
+	hex
+	default 0x10000
+
 endif

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Id96e10aea3e5fd955d45287134eb8643be414de9
Gerrit-Change-Number: 27748
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur at aheymans.xyz>
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