[coreboot-gerrit] Change in coreboot[master]: soc/amd/stoneyridge: Add IGFX device ACPI ASL entry

[Marc Jones (Code Review)]

Marc Jones has uploaded this change for review. ( https://review.coreboot.org/27653


Change subject: soc/amd/stoneyridge: Add IGFX device ACPI ASL entry
......................................................................

soc/amd/stoneyridge: Add IGFX device ACPI ASL entry

Add internal graphics device 00.01.00 to the ACPI tables so that the
ACPI PCI option ROM save functions have a proper scope to save the
ROM to.

BUG=b:111697181
TEST=Check coreboot log doesn't have "PCI: 00:01.0: Missing ACPI scope"
and check _ROM method is added in the SSDT1.

Change-Id: I2c9ef8d9dff76805b1fcde2ccceef958a5b53b4f
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
M src/soc/amd/stoneyridge/acpi/northbridge.asl
M src/soc/amd/stoneyridge/chip.c
2 files changed, 7 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/27653/1

diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl
index 4df6567..fe78534 100644
--- a/src/soc/amd/stoneyridge/acpi/northbridge.asl
+++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl
@@ -46,6 +46,11 @@
 	Name(_ADR, 0x00000000)
 } /* end AMRT */
 
+/* Internal Graphics */
+Device(IGFX) {
+	Name(_ADR, 0x00010000)
+}
+
 /* Gpp 0 */
 Device(PBR4) {
 	Name(_ADR, 0x00020001)
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index 9ca2db7..33c1730 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -82,6 +82,8 @@
 		return NULL;
 
 	switch (dev->path.pci.devfn) {
+	case GFX_DEVFN:
+		return "IGFX";
 	case PCIE0_DEVFN:
 		return "PBR4";
 	case PCIE1_DEVFN:

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I2c9ef8d9dff76805b1fcde2ccceef958a5b53b4f
Gerrit-Change-Number: 27653
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones <marc at marcjonesconsulting.com>
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