[coreboot-gerrit] Change in coreboot[master]: src/soc/amd/stoneyridge: Remove IMC support
Richard Spiegel (Code Review)
gerrit at coreboot.org
Thu Jul 26 23:29:03 CEST 2018
Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/27651
Change subject: src/soc/amd/stoneyridge: Remove IMC support
......................................................................
src/soc/amd/stoneyridge: Remove IMC support
An agreement between AMD and Google decided to remove all support to IMC.
All boards will use external EC. Remove all stoney IMC files and functions
from src/soc/amd/stoneyridge.
BUG=b:111780177
TEST=Build grunt and gardenia
Change-Id: I6a24e4c3f03d04713a030b884c611d9c64c4cb3a
Signed-off-by: Richard Spiegel <richard.spiegel at silverbackltd.com>
---
M src/soc/amd/stoneyridge/BiosCallOuts.c
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/Makefile.inc
D src/soc/amd/stoneyridge/acpi/AmdImc.asl
M src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
D src/soc/amd/stoneyridge/imc.c
D src/soc/amd/stoneyridge/include/fchec.h
D src/soc/amd/stoneyridge/include/soc/imc.h
M src/soc/amd/stoneyridge/southbridge.c
M src/soc/amd/stoneyridge/spi.c
10 files changed, 1 insertion(+), 238 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/27651/1
diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index d2f7a32..430dc45 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -58,9 +58,6 @@
FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM))
- oem_fan_control(FchParams_env);
-
/* XHCI configuration */
if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE))
FchParams_env->Usb.Xhci0Enable = TRUE;
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 05c3043..7675bce 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -171,12 +171,6 @@
help
Add Stoney Ridge XHCI Firmware to support the onboard USB 3.0
-config STONEYRIDGE_IMC_FWM
- bool "Add IMC firmware"
- default n
- help
- Add Stoney Ridge IMC Firmware to support the onboard fan control
-
config STONEYRIDGE_GEC_FWM
bool
default n
@@ -189,11 +183,6 @@
default "3rdparty/blobs/soc/amd/stoneyridge/xhci.bin"
depends on STONEYRIDGE_XHCI_FWM
-config STONEYRIDGE_IMC_FWM_FILE
- string "IMC firmware path and filename"
- default "3rdparty/blobs/soc/amd/stoneyridge/imc.bin"
- depends on STONEYRIDGE_IMC_FWM
-
config STONEYRIDGE_GEC_FWM_FILE
string "GEC firmware path and filename"
depends on STONEYRIDGE_GEC_FWM
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index 5df4889..bf5724f 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -57,7 +57,6 @@
romstage-y += romstage.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
romstage-y += gpio.c
-romstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c
romstage-y += monotonic_timer.c
romstage-y += pmutil.c
romstage-y += reset.c
@@ -100,7 +99,6 @@
ramstage-y += monotonic_timer.c
ramstage-y += southbridge.c
ramstage-y += sb_util.c
-ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c
ramstage-y += lpc.c
ramstage-y += northbridge.c
ramstage-y += pmutil.c
@@ -200,7 +198,6 @@
add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci)
-OPT_STONEYRIDGE_IMC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_IMC_FWM_FILE), --imc)
OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILEddd), --gec)
OPT_2AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey2)
@@ -222,7 +219,6 @@
$(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \
- $(call strip_quotes, $(CONFIG_STONEYRIDGE_IMC_FWM_FILE)) \
$(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \
$(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
$(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \
@@ -243,7 +239,6 @@
@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
$(AMDFWTOOL) \
$(OPT_STONEYRIDGE_XHCI_FWM_FILE) \
- $(OPT_STONEYRIDGE_IMC_FWM_FILE) \
$(OPT_STONEYRIDGE_GEC_FWM_FILE) \
$(OPT_AMD_PUBKEY_FILE) \
$(OPT_PSPBTLDR_FILE) \
diff --git a/src/soc/amd/stoneyridge/acpi/AmdImc.asl b/src/soc/amd/stoneyridge/acpi/AmdImc.asl
deleted file mode 100644
index 519b05c..0000000
--- a/src/soc/amd/stoneyridge/acpi/AmdImc.asl
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-//BTDC Due to IMC Fan, ACPI control codes
-OperationRegion(IMIO, SystemIO, 0x3E, 0x02)
-Field(IMIO , ByteAcc, NoLock, Preserve) {
- IMCX,8,
- IMCA,8
-}
-
-IndexField(IMCX, IMCA, ByteAcc, NoLock, Preserve) {
- Offset(0x80),
- MSTI, 8,
- MITS, 8,
- MRG0, 8,
- MRG1, 8,
- MRG2, 8,
- MRG3, 8,
-}
-
-Method(WACK, 0)
-{
- Store(0, Local0)
- While (LNotEqual(Local0, 0xFA)) {
- Store(MRG0, Local0)
- Sleep(10)
- }
-}
-
-//Init
-Method (ITZE, 0)
-{
- Store(0, MRG0)
- Store(0xB5, MRG1)
- Store(0, MRG2)
- Store(0x96, MSTI)
- WACK()
-
- Store(0, MRG0)
- Store(0, MRG1)
- Store(0, MRG2)
- Store(0x80, MSTI)
- WACK()
-
- Or(MRG2, 0x01, Local0)
-
- Store(0, MRG0)
- Store(0, MRG1)
- Store(Local0, MRG2)
- Store(0x81, MSTI)
- WACK()
-}
diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
index e767fdd..81964ba 100644
--- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
+++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
@@ -130,10 +130,6 @@
Return(CRES) /* note to change the Name buffer */
} /* end of Method(_SB.PCI0._CRS) */
-#if IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)
- #include "acpi/AmdImc.asl"
-#endif
-
/*
*
* FIRST METHOD CALLED UPON BOOT
@@ -158,12 +154,6 @@
/* Determine the OS we're running on */
OSFL()
-
-#if IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)
-#if IS_ENABLED(CONFIG_ACPI_ENABLE_THERMAL_ZONE)
- ITZE() /* enable IMC Fan Control*/
-#endif
-#endif
} /* End Method(_SB._INI) */
Method(OSFL, 0){
diff --git a/src/soc/amd/stoneyridge/imc.c b/src/soc/amd/stoneyridge/imc.c
deleted file mode 100644
index 5d883d9..0000000
--- a/src/soc/amd/stoneyridge/imc.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#define __SIMPLE_DEVICE__
-
-#include <amdblocks/agesawrapper.h>
-#include <soc/imc.h>
-#include <arch/io.h>
-#include <device/device.h>
-#include <delay.h>
-
-#define VACPI_MMIO_VBASE ((u8 *)ACPI_MMIO_BASE)
-
-void imc_reg_init(void)
-{
- u8 reg8;
- /* Init Power Management Block 2 (PM2) Registers.
- * Check BKDG for AMD Family 16h for details. */
- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x00), 0x06);
- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x01), 0x06);
- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x02), 0xf7);
- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x03), 0xff);
- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x04), 0xff);
-
- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x10), 0x06);
- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x11), 0x06);
- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x12), 0xf7);
- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x13), 0xff);
- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x14), 0xff);
-
- reg8 = pci_read_config8(PCI_DEV(0, 0x18, 0x3), 0x1e4);
- reg8 &= 0x8f;
- reg8 |= 0x10;
- pci_write_config8(PCI_DEV(0, 0x18, 0x3), 0x1e4, reg8);
-}
-
-void enable_imc_thermal_zone(void)
-{
- AMD_CONFIG_PARAMS StdHeader;
- UINT8 FunNum;
- UINT8 regs[10];
- int i;
-
- regs[0] = 0;
- regs[1] = 0;
- FunNum = Fun_80;
- for (i = 0 ; i <= 1 ; i++)
- WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);
- WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader);
- WaitForEcLDN9MailboxCmdAck(&StdHeader);
-
- for (i = 2 ; i < ARRAY_SIZE(regs) ; i++)
- ReadECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);
-
- /* enable thermal zone 0 */
- regs[2] |= 1;
- regs[0] = 0;
- regs[1] = 0;
- FunNum = Fun_81;
- for (i = 0 ; i < ARRAY_SIZE(regs) ; i++)
- WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);
- WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader);
- WaitForEcLDN9MailboxCmdAck(&StdHeader);
-}
-
-void imc_sleep(void)
-{
- ImcSleep(NULL);
-}
-
-void imc_wakeup(void)
-{
- ImcWakeup(NULL);
-}
diff --git a/src/soc/amd/stoneyridge/include/fchec.h b/src/soc/amd/stoneyridge/include/fchec.h
deleted file mode 100644
index 80125ec..0000000
--- a/src/soc/amd/stoneyridge/include/fchec.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __AMD_STONEY_FCHEC__
-#define __AMD_STONEY_FCHEC__
-
-#include <amdblocks/agesawrapper.h>
-#include <soc/imc.h>
-
-void agesawrapper_fchecfancontrolservice(void);
-
-#endif
diff --git a/src/soc/amd/stoneyridge/include/soc/imc.h b/src/soc/amd/stoneyridge/include/soc/imc.h
deleted file mode 100644
index 079df79..0000000
--- a/src/soc/amd/stoneyridge/include/soc/imc.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __STONEYRIDGE_IMC_H__
-#define __STONEYRIDGE_IMC_H__
-
-void imc_reg_init(void);
-void enable_imc_thermal_zone(void);
-void imc_sleep(void);
-void imc_wakeup(void);
-
-#endif
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 18e6c6c..e893cb7 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -25,10 +25,10 @@
#include <cbmem.h>
#include <elog.h>
#include <amdblocks/amd_pci_util.h>
+#include <amdblocks/agesawrapper.h>
#include <soc/southbridge.h>
#include <soc/smi.h>
#include <soc/amd_pci_int_defs.h>
-#include <fchec.h>
#include <delay.h>
#include <soc/pci_devs.h>
#include <agesa_headers.h>
@@ -766,11 +766,6 @@
{
uint8_t restored_power = PM_S5_AT_POWER_RECOVERY;
- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)) {
- agesawrapper_fchecfancontrolservice();
- if (!IS_ENABLED(CONFIG_ACPI_ENABLE_THERMAL_ZONE))
- enable_imc_thermal_zone();
- }
if (IS_ENABLED(CONFIG_MAINBOARD_POWER_RESTORE))
restored_power = PM_RESTORE_S0_IF_PREV_S0;
pm_write8(PM_RTC_SHADOW, restored_power);
diff --git a/src/soc/amd/stoneyridge/spi.c b/src/soc/amd/stoneyridge/spi.c
index 718ad94..9baf433 100644
--- a/src/soc/amd/stoneyridge/spi.c
+++ b/src/soc/amd/stoneyridge/spi.c
@@ -29,7 +29,6 @@
#include <device/pci_ops.h>
#include <soc/southbridge.h>
#include <soc/pci_devs.h>
-#include <soc/imc.h>
#define SPI_DEBUG_DRIVER IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
@@ -169,15 +168,11 @@
int chipset_volatile_group_begin(const struct spi_flash *flash)
{
- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM))
- imc_sleep();
return 0;
}
int chipset_volatile_group_end(const struct spi_flash *flash)
{
- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM))
- imc_wakeup();
return 0;
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I6a24e4c3f03d04713a030b884c611d9c64c4cb3a
Gerrit-Change-Number: 27651
Gerrit-PatchSet: 1
Gerrit-Owner: Richard Spiegel <richard.spiegel at silverbackltd.com>
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