<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27651">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/soc/amd/stoneyridge: Remove IMC support<br><br>An agreement between AMD and Google decided to remove all support to IMC.<br>All boards will use external EC. Remove all stoney IMC files and functions<br>from src/soc/amd/stoneyridge.<br><br>BUG=b:111780177<br>TEST=Build grunt and gardenia<br><br>Change-Id: I6a24e4c3f03d04713a030b884c611d9c64c4cb3a<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M src/soc/amd/stoneyridge/BiosCallOuts.c<br>M src/soc/amd/stoneyridge/Kconfig<br>M src/soc/amd/stoneyridge/Makefile.inc<br>D src/soc/amd/stoneyridge/acpi/AmdImc.asl<br>M src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl<br>D src/soc/amd/stoneyridge/imc.c<br>D src/soc/amd/stoneyridge/include/fchec.h<br>D src/soc/amd/stoneyridge/include/soc/imc.h<br>M src/soc/amd/stoneyridge/southbridge.c<br>M src/soc/amd/stoneyridge/spi.c<br>10 files changed, 1 insertion(+), 238 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/27651/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c</span><br><span>index d2f7a32..430dc45 100644</span><br><span>--- a/src/soc/amd/stoneyridge/BiosCallOuts.c</span><br><span>+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c</span><br><span>@@ -58,9 +58,6 @@</span><br><span> FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;</span><br><span> printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM))</span><br><span style="color: hsl(0, 100%, 40%);">- oem_fan_control(FchParams_env);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* XHCI configuration */</span><br><span> if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE))</span><br><span> FchParams_env->Usb.Xhci0Enable = TRUE;</span><br><span>diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig</span><br><span>index 05c3043..7675bce 100644</span><br><span>--- a/src/soc/amd/stoneyridge/Kconfig</span><br><span>+++ b/src/soc/amd/stoneyridge/Kconfig</span><br><span>@@ -171,12 +171,6 @@</span><br><span> help</span><br><span> Add Stoney Ridge XHCI Firmware to support the onboard USB 3.0</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config STONEYRIDGE_IMC_FWM</span><br><span style="color: hsl(0, 100%, 40%);">- bool "Add IMC firmware"</span><br><span style="color: hsl(0, 100%, 40%);">- default n</span><br><span style="color: hsl(0, 100%, 40%);">- help</span><br><span style="color: hsl(0, 100%, 40%);">- Add Stoney Ridge IMC Firmware to support the onboard fan control</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config STONEYRIDGE_GEC_FWM</span><br><span> bool</span><br><span> default n</span><br><span>@@ -189,11 +183,6 @@</span><br><span> default "3rdparty/blobs/soc/amd/stoneyridge/xhci.bin"</span><br><span> depends on STONEYRIDGE_XHCI_FWM</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-config STONEYRIDGE_IMC_FWM_FILE</span><br><span style="color: hsl(0, 100%, 40%);">- string "IMC firmware path and filename"</span><br><span style="color: hsl(0, 100%, 40%);">- default "3rdparty/blobs/soc/amd/stoneyridge/imc.bin"</span><br><span style="color: hsl(0, 100%, 40%);">- depends on STONEYRIDGE_IMC_FWM</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> config STONEYRIDGE_GEC_FWM_FILE</span><br><span> string "GEC firmware path and filename"</span><br><span> depends on STONEYRIDGE_GEC_FWM</span><br><span>diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc</span><br><span>index 5df4889..bf5724f 100644</span><br><span>--- a/src/soc/amd/stoneyridge/Makefile.inc</span><br><span>+++ b/src/soc/amd/stoneyridge/Makefile.inc</span><br><span>@@ -57,7 +57,6 @@</span><br><span> romstage-y += romstage.c</span><br><span> romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c</span><br><span> romstage-y += gpio.c</span><br><span style="color: hsl(0, 100%, 40%);">-romstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c</span><br><span> romstage-y += monotonic_timer.c</span><br><span> romstage-y += pmutil.c</span><br><span> romstage-y += reset.c</span><br><span>@@ -100,7 +99,6 @@</span><br><span> ramstage-y += monotonic_timer.c</span><br><span> ramstage-y += southbridge.c</span><br><span> ramstage-y += sb_util.c</span><br><span style="color: hsl(0, 100%, 40%);">-ramstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c</span><br><span> ramstage-y += lpc.c</span><br><span> ramstage-y += northbridge.c</span><br><span> ramstage-y += pmutil.c</span><br><span>@@ -200,7 +198,6 @@</span><br><span> add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )</span><br><span> </span><br><span> OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci)</span><br><span style="color: hsl(0, 100%, 40%);">-OPT_STONEYRIDGE_IMC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_IMC_FWM_FILE), --imc)</span><br><span> OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILEddd), --gec)</span><br><span> </span><br><span> OPT_2AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey2)</span><br><span>@@ -222,7 +219,6 @@</span><br><span> </span><br><span> </span><br><span> $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \</span><br><span style="color: hsl(0, 100%, 40%);">- $(call strip_quotes, $(CONFIG_STONEYRIDGE_IMC_FWM_FILE)) \</span><br><span> $(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \</span><br><span> $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \</span><br><span> $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \</span><br><span>@@ -243,7 +239,6 @@</span><br><span> @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"</span><br><span> $(AMDFWTOOL) \</span><br><span> $(OPT_STONEYRIDGE_XHCI_FWM_FILE) \</span><br><span style="color: hsl(0, 100%, 40%);">- $(OPT_STONEYRIDGE_IMC_FWM_FILE) \</span><br><span> $(OPT_STONEYRIDGE_GEC_FWM_FILE) \</span><br><span> $(OPT_AMD_PUBKEY_FILE) \</span><br><span> $(OPT_PSPBTLDR_FILE) \</span><br><span>diff --git a/src/soc/amd/stoneyridge/acpi/AmdImc.asl b/src/soc/amd/stoneyridge/acpi/AmdImc.asl</span><br><span>deleted file mode 100644</span><br><span>index 519b05c..0000000</span><br><span>--- a/src/soc/amd/stoneyridge/acpi/AmdImc.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,64 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2015 Advanced Micro Devices, Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-//BTDC Due to IMC Fan, ACPI control codes</span><br><span style="color: hsl(0, 100%, 40%);">-OperationRegion(IMIO, SystemIO, 0x3E, 0x02)</span><br><span style="color: hsl(0, 100%, 40%);">-Field(IMIO , ByteAcc, NoLock, Preserve) {</span><br><span style="color: hsl(0, 100%, 40%);">- IMCX,8,</span><br><span style="color: hsl(0, 100%, 40%);">- IMCA,8</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-IndexField(IMCX, IMCA, ByteAcc, NoLock, Preserve) {</span><br><span style="color: hsl(0, 100%, 40%);">- Offset(0x80),</span><br><span style="color: hsl(0, 100%, 40%);">- MSTI, 8,</span><br><span style="color: hsl(0, 100%, 40%);">- MITS, 8,</span><br><span style="color: hsl(0, 100%, 40%);">- MRG0, 8,</span><br><span style="color: hsl(0, 100%, 40%);">- MRG1, 8,</span><br><span style="color: hsl(0, 100%, 40%);">- MRG2, 8,</span><br><span style="color: hsl(0, 100%, 40%);">- MRG3, 8,</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-Method(WACK, 0)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0, Local0)</span><br><span style="color: hsl(0, 100%, 40%);">- While (LNotEqual(Local0, 0xFA)) {</span><br><span style="color: hsl(0, 100%, 40%);">- Store(MRG0, Local0)</span><br><span style="color: hsl(0, 100%, 40%);">- Sleep(10)</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-//Init</span><br><span style="color: hsl(0, 100%, 40%);">-Method (ITZE, 0)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0, MRG0)</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0xB5, MRG1)</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0, MRG2)</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0x96, MSTI)</span><br><span style="color: hsl(0, 100%, 40%);">- WACK()</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0, MRG0)</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0, MRG1)</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0, MRG2)</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0x80, MSTI)</span><br><span style="color: hsl(0, 100%, 40%);">- WACK()</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- Or(MRG2, 0x01, Local0)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0, MRG0)</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0, MRG1)</span><br><span style="color: hsl(0, 100%, 40%);">- Store(Local0, MRG2)</span><br><span style="color: hsl(0, 100%, 40%);">- Store(0x81, MSTI)</span><br><span style="color: hsl(0, 100%, 40%);">- WACK()</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl</span><br><span>index e767fdd..81964ba 100644</span><br><span>--- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl</span><br><span>+++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl</span><br><span>@@ -130,10 +130,6 @@</span><br><span> Return(CRES) /* note to change the Name buffer */</span><br><span> } /* end of Method(_SB.PCI0._CRS) */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#if IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)</span><br><span style="color: hsl(0, 100%, 40%);">- #include "acpi/AmdImc.asl"</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /*</span><br><span> *</span><br><span> * FIRST METHOD CALLED UPON BOOT</span><br><span>@@ -158,12 +154,6 @@</span><br><span> </span><br><span> /* Determine the OS we're running on */</span><br><span> OSFL()</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#if IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)</span><br><span style="color: hsl(0, 100%, 40%);">-#if IS_ENABLED(CONFIG_ACPI_ENABLE_THERMAL_ZONE)</span><br><span style="color: hsl(0, 100%, 40%);">- ITZE() /* enable IMC Fan Control*/</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span> } /* End Method(_SB._INI) */</span><br><span> </span><br><span> Method(OSFL, 0){</span><br><span>diff --git a/src/soc/amd/stoneyridge/imc.c b/src/soc/amd/stoneyridge/imc.c</span><br><span>deleted file mode 100644</span><br><span>index 5d883d9..0000000</span><br><span>--- a/src/soc/amd/stoneyridge/imc.c</span><br><span>+++ /dev/null</span><br><span>@@ -1,86 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2012 Advanced Micro Devices, Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#define __SIMPLE_DEVICE__</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <amdblocks/agesawrapper.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/imc.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/io.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/device.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <delay.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#define VACPI_MMIO_VBASE ((u8 *)ACPI_MMIO_BASE)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void imc_reg_init(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- u8 reg8;</span><br><span style="color: hsl(0, 100%, 40%);">- /* Init Power Management Block 2 (PM2) Registers.</span><br><span style="color: hsl(0, 100%, 40%);">- * Check BKDG for AMD Family 16h for details. */</span><br><span style="color: hsl(0, 100%, 40%);">- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x00), 0x06);</span><br><span style="color: hsl(0, 100%, 40%);">- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x01), 0x06);</span><br><span style="color: hsl(0, 100%, 40%);">- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x02), 0xf7);</span><br><span style="color: hsl(0, 100%, 40%);">- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x03), 0xff);</span><br><span style="color: hsl(0, 100%, 40%);">- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x04), 0xff);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x10), 0x06);</span><br><span style="color: hsl(0, 100%, 40%);">- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x11), 0x06);</span><br><span style="color: hsl(0, 100%, 40%);">- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x12), 0xf7);</span><br><span style="color: hsl(0, 100%, 40%);">- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x13), 0xff);</span><br><span style="color: hsl(0, 100%, 40%);">- write8((VACPI_MMIO_VBASE + PMIO2_BASE + 0x14), 0xff);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 = pci_read_config8(PCI_DEV(0, 0x18, 0x3), 0x1e4);</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 &= 0x8f;</span><br><span style="color: hsl(0, 100%, 40%);">- reg8 |= 0x10;</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config8(PCI_DEV(0, 0x18, 0x3), 0x1e4, reg8);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void enable_imc_thermal_zone(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- AMD_CONFIG_PARAMS StdHeader;</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 FunNum;</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 regs[10];</span><br><span style="color: hsl(0, 100%, 40%);">- int i;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- regs[0] = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- regs[1] = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- FunNum = Fun_80;</span><br><span style="color: hsl(0, 100%, 40%);">- for (i = 0 ; i <= 1 ; i++)</span><br><span style="color: hsl(0, 100%, 40%);">- WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">- WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">- WaitForEcLDN9MailboxCmdAck(&StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- for (i = 2 ; i < ARRAY_SIZE(regs) ; i++)</span><br><span style="color: hsl(0, 100%, 40%);">- ReadECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* enable thermal zone 0 */</span><br><span style="color: hsl(0, 100%, 40%);">- regs[2] |= 1;</span><br><span style="color: hsl(0, 100%, 40%);">- regs[0] = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- regs[1] = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- FunNum = Fun_81;</span><br><span style="color: hsl(0, 100%, 40%);">- for (i = 0 ; i < ARRAY_SIZE(regs) ; i++)</span><br><span style="color: hsl(0, 100%, 40%);">- WriteECmsg(MSG_REG0 + i, AccessWidth8, ®s[i], &StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">- WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">- WaitForEcLDN9MailboxCmdAck(&StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void imc_sleep(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- ImcSleep(NULL);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void imc_wakeup(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- ImcWakeup(NULL);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/soc/amd/stoneyridge/include/fchec.h b/src/soc/amd/stoneyridge/include/fchec.h</span><br><span>deleted file mode 100644</span><br><span>index 80125ec..0000000</span><br><span>--- a/src/soc/amd/stoneyridge/include/fchec.h</span><br><span>+++ /dev/null</span><br><span>@@ -1,24 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2012 Advanced Micro Devices, Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef __AMD_STONEY_FCHEC__</span><br><span style="color: hsl(0, 100%, 40%);">-#define __AMD_STONEY_FCHEC__</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <amdblocks/agesawrapper.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/imc.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void agesawrapper_fchecfancontrolservice(void);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span>diff --git a/src/soc/amd/stoneyridge/include/soc/imc.h b/src/soc/amd/stoneyridge/include/soc/imc.h</span><br><span>deleted file mode 100644</span><br><span>index 079df79..0000000</span><br><span>--- a/src/soc/amd/stoneyridge/include/soc/imc.h</span><br><span>+++ /dev/null</span><br><span>@@ -1,24 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2012 Advanced Micro Devices, Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef __STONEYRIDGE_IMC_H__</span><br><span style="color: hsl(0, 100%, 40%);">-#define __STONEYRIDGE_IMC_H__</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void imc_reg_init(void);</span><br><span style="color: hsl(0, 100%, 40%);">-void enable_imc_thermal_zone(void);</span><br><span style="color: hsl(0, 100%, 40%);">-void imc_sleep(void);</span><br><span style="color: hsl(0, 100%, 40%);">-void imc_wakeup(void);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span>diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c</span><br><span>index 18e6c6c..e893cb7 100644</span><br><span>--- a/src/soc/amd/stoneyridge/southbridge.c</span><br><span>+++ b/src/soc/amd/stoneyridge/southbridge.c</span><br><span>@@ -25,10 +25,10 @@</span><br><span> #include <cbmem.h></span><br><span> #include <elog.h></span><br><span> #include <amdblocks/amd_pci_util.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <amdblocks/agesawrapper.h></span><br><span> #include <soc/southbridge.h></span><br><span> #include <soc/smi.h></span><br><span> #include <soc/amd_pci_int_defs.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <fchec.h></span><br><span> #include <delay.h></span><br><span> #include <soc/pci_devs.h></span><br><span> #include <agesa_headers.h></span><br><span>@@ -766,11 +766,6 @@</span><br><span> {</span><br><span> uint8_t restored_power = PM_S5_AT_POWER_RECOVERY;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM)) {</span><br><span style="color: hsl(0, 100%, 40%);">- agesawrapper_fchecfancontrolservice();</span><br><span style="color: hsl(0, 100%, 40%);">- if (!IS_ENABLED(CONFIG_ACPI_ENABLE_THERMAL_ZONE))</span><br><span style="color: hsl(0, 100%, 40%);">- enable_imc_thermal_zone();</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span> if (IS_ENABLED(CONFIG_MAINBOARD_POWER_RESTORE))</span><br><span> restored_power = PM_RESTORE_S0_IF_PREV_S0;</span><br><span> pm_write8(PM_RTC_SHADOW, restored_power);</span><br><span>diff --git a/src/soc/amd/stoneyridge/spi.c b/src/soc/amd/stoneyridge/spi.c</span><br><span>index 718ad94..9baf433 100644</span><br><span>--- a/src/soc/amd/stoneyridge/spi.c</span><br><span>+++ b/src/soc/amd/stoneyridge/spi.c</span><br><span>@@ -29,7 +29,6 @@</span><br><span> #include <device/pci_ops.h></span><br><span> #include <soc/southbridge.h></span><br><span> #include <soc/pci_devs.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/imc.h></span><br><span> </span><br><span> #define SPI_DEBUG_DRIVER IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)</span><br><span> </span><br><span>@@ -169,15 +168,11 @@</span><br><span> </span><br><span> int chipset_volatile_group_begin(const struct spi_flash *flash)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM))</span><br><span style="color: hsl(0, 100%, 40%);">- imc_sleep();</span><br><span> return 0;</span><br><span> }</span><br><span> </span><br><span> int chipset_volatile_group_end(const struct spi_flash *flash)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM))</span><br><span style="color: hsl(0, 100%, 40%);">- imc_wakeup();</span><br><span> return 0;</span><br><span> }</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27651">change 27651</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27651"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6a24e4c3f03d04713a030b884c611d9c64c4cb3a </div>
<div style="display:none"> Gerrit-Change-Number: 27651 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>